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Early Stage Power Supply Planning: A Heuristic Method for Codesign of Power/Ground Network and Floorplan Xiaoyi WANG Jin SHI Yici CAI Xianlong HONG | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/12/01
Vol. E91-A
No. 12
pp. 3443-3450
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Physical Level Design Keyword: power/ground network, floorplan, IR drop, | | Summary | Full Text:PDF | |
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Dummy Fill Aware Buffer Insertion after Layer Assignment Based on an Effective Estimation Model Yanming JIA Yici CAI Xianlong HONG | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/12/01
Vol. E91-A
No. 12
pp. 3783-3792
Type of Manuscript:
PAPER Category: VLSI Design Technology and CAD Keyword: VLSI, buffer insertion, physical design, DFM, dummy fill, | | Summary | Full Text:PDF | |
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