Yibo FAN

A Highly Configurable 7.62GOP/s Hardware Implementation for LSTM
Yibo FAN Leilei HUANG Kewei CHEN Xiaoyang ZENG 
Publication:   
Publication Date: 2020/05/01
Vol. E103-C  No. 5  pp. 263-273
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
Recurrent Neural Networks (RNN), Long Short-Term Memory (LSTM), hardware implementation, 
 Summary | Full Text:PDF
A Micro-Code-Based IME Engine for HEVC and Its Hardware Implementation
Leilei HUANG Yibo FAN Chenhao GU Xiaoyang ZENG 
Publication:   
Publication Date: 2019/10/01
Vol. E102-C  No. 10  pp. 756-765
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
high efficiency video coding (HEVC), integer motion estimation (IME), hardware implementation, very large scale integration (VLSI), 
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A High-Throughput and Compact Hardware Implementation for the Reconstruction Loop in HEVC Intra Encoding
Yibo FAN Leilei HUANG Zheng XIE Xiaoyang ZENG 
Publication:   
Publication Date: 2017/06/01
Vol. E100-C  No. 6  pp. 643-654
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
reconstruction loop, discrete cosine transform (DCT), inverse discrete cosine transform (IDCT), quantization (Q), de-quantization (IQ), high efficiency video coding (HEVC), 
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A Unified Forward/Inverse Transform Architecture for Multi-Standard Video Codec Design
Sha SHEN Weiwei SHEN Yibo FAN Xiaoyang ZENG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/07/01
Vol. E96-A  No. 7  pp. 1534-1542
Type of Manuscript:  PAPER
Category: Digital Signal Processing
Keyword: 
HEVC, integer DCT/IDCT, Hadamard transform, input-muxed constant multiplier, multi-standard video coding, 
 Summary | Full Text:PDF
Architecture and Physical Implementation of Reconfigurable Multi-Port Physical Unclonable Functions in 65 nm CMOS
Pengjun WANG Yuejun ZHANG Jun HAN Zhiyi YU Yibo FAN Zhang ZHANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/05/01
Vol. E96-A  No. 5  pp. 963-970
Type of Manuscript:  PAPER
Category: Cryptography and Information Security
Keyword: 
RM-PUFs, reconfigurable, Multi-port, asynchronous clock, 65 nm, 
 Summary | Full Text:PDF
An 88/44 Adaptive Hadamard Transform Based FME VLSI Architecture for 4 K2 K H.264/AVC Encoder
Yibo FAN Jialiang LIU Dexue ZHANG Xiaoyang ZENG Xinhua CHEN 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C  No. 4  pp. 447-455
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
fractional motion estimation, adaptive block-size hadamard transform, H.264/MPEG4 AVC, 4 K2 K, quad full high definition, 
 Summary | Full Text:PDF
A 64 Cycles/MB, Luma-Chroma Parallelized H.264/AVC Deblocking Filter for 4 K2 K Applications
Weiwei SHEN Yibo FAN Xiaoyang ZENG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C  No. 4  pp. 441-446
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
H.264/AVC, deblocking filter, pipeline, parallelism, 4 K2 K, 
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Optimized 2-D SAD Tree Architecture of Integer Motion Estimation for H.264/AVC
Yibo FAN Xiaoyang ZENG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/04/01
Vol. E94-C  No. 4  pp. 411-418
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
IME, VBSME, 2-D SAD tree, H.264, 
 Summary | Full Text:PDF
Reconfigurable Variable Block Size Motion Estimation Architecture for Search Range Reduction Algorithm
Yibo FAN Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/04/01
Vol. E91-C  No. 4  pp. 440-448
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Technologies in Digital LSIs and Memories)
Category: 
Keyword: 
reconfigurable, VBSME, search range reduction, H.264, 
 Summary | Full Text:PDF
A High-Speed Design of Montgomery Multiplier
Yibo FAN Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/04/01
Vol. E91-A  No. 4  pp. 971-977
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 20th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
Montgomery multiplier, high-speed, high-radix, scalable, 
 Summary | Full Text:PDF
An Unequal Secure Encryption Scheme for H.264/AVC Video Compression Standard
Yibo FAN Jidong WANG Takeshi IKENAGA Yukiyasu TSUNOO Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/01/01
Vol. E91-A  No. 1  pp. 12-21
Type of Manuscript:  Special Section PAPER (Special Section on Cryptography and Information Security)
Category: Symmetric Cryptography
Keyword: 
Unequal Secure Encryption, video encryption, selective encryption, H.264/AVC, AES, LEX, 
 Summary | Full Text:PDF