Yi ZOU


Stochastic Interconnect Tree Construction Algorithm with Accurate Delay and Power Consideration
Yibo WANG Yici CAI Xianlong HONG Yi ZOU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/05/01
Vol. E90-A  No. 5  pp. 1028-1037
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
interconnect optimizationaccurate delay modellow powerbuffer insertion
 Summary | Full Text:PDF

A Fast Delay Computation for the Hybrid Structured Clock Network
Yi ZOU Yici CAI Qiang ZHOU Xianlong HONG Sheldon X.-D. TAN 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/07/01
Vol. E88-A  No. 7  pp. 1964-1970
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
clock networkssimulationanalysisdelayElmore delay
 Summary | Full Text:PDF