Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2013/09/01 Vol. E96-DNo. 9pp. 2012-2020 Type of Manuscript: Special Section PAPER (Special Section on Dependable Computing) Category: Keyword: low power, BIST, multi-cycle test, shift power,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/03/01 Vol. E89-CNo. 3pp. 349-355 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era) Category: Signal Integrity and Variability Keyword: delay testing, quality model, defect distribution,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/12/01 Vol. E87-ANo. 12pp. 3318-3323 Type of Manuscript: Special Section LETTER (Special Section on VLSI Design and CAD Algorithms) Category: Test Keyword: BIST, test pattern generator, neighborhood pattern, LFSR, reseeding,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2004/09/01 Vol. E87-DNo. 9pp. 2179-2185 Type of Manuscript: PAPER Category: Dependable Computing Keyword: diagnosis, open fault, coupling effect,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/12/01 Vol. E86-ANo. 12pp. 3049-3055 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Timing Verification and Test Generation Keyword: DFT, at-speed BIST, timing design, multiple-clock,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2002/10/01 Vol. E85-DNo. 10pp. 1506-1514 Type of Manuscript: Special Section PAPER (Special Issue on Test and Verification of VLSI) Category: Test and Diagnosis for Timing Faults Keyword: delay testing, path selection, fault simulation, test generation, path-status graph,