| Yasunobu NAKASE
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Interface Technologies for Memories and ASICs -- Review and Future Direction -- Yasuhiro KONISHI Yasunobu NAKASE Katsushi ASAHINA Makoto TANIGUCHI Michihiro YAMADA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 1999/03/25
Vol. E82-C
No. 3
pp. 438-447
Type of Manuscript:
INVITED PAPER (Special Issue on Ultra-High-Speed IC and LSI Technology) Category: Keyword: IO interface, LVTTL, SSTL, SLDRAM, D-RDRAM, PCI, AGP, GTL, HSTL, LVDS, | | Summary | Full Text:PDF | |
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A 286 MHz 64-b Floating Point Multiplier with Enhanced CG Operation Hiroshi MAKINO Hiroaki SUZUKI Hiroyuki MORINAKA Yasunobu NAKASE Koichiro MASHIKO Tadashi SUMI | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 1996/07/25
Vol. E79-C
No. 7
pp. 915-924
Type of Manuscript:
Special Section PAPER (Special Issue on the 1995 Symposium on VLSI Circuits (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.31, No.4 April 1996)) Category: Logic Keyword:
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