IEICE Trans

Yasuhiro SUGIMOTO

FOREWORD Yasuhiro SUGIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2016/06/01 Vol. E99-C No. 6 pp. 604-605 Type of Manuscript: FOREWORD Category: Keyword:
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Circuit Techniques to Enhance Linearity and Intrinsic Gain to Realize a 1.2 V, 200 MHz, +10.3 dBm IIP3 and 7th-Order LPF in a 65 nm CMOS Yasuhiro SUGIMOTO Kazuma SAKATOH
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2013/06/01 Vol. E96-C No. 6 pp. 867-874 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: 7th-order LPF, RF-LPF, linearity enhancement, low intrinsic gain, current feedback, Sub-100-nm MOS,
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A Precision and High-Speed Behavioral Simulation Method for Transient Response and Frequency Characteristics of Switching Converters Toru SAI Shoko SUGIMOTO Yasuhiro SUGIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2012/06/01 Vol. E95-C No. 6 pp. 1067-1076 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: DC-DC converter, behavioral analog simulation, high-speed, highly accurate, buck converter, boost converter,
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A Current-Mode Buck DC-DC Converter with Frequency Characteristics Independent of Input and Output Voltages Using a Quadratic Compensation Slope Toru SAI Yasuhiro SUGIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2012/04/01 Vol. E95-C No. 4 pp. 677-685 Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology) Category: Keyword: DC-DC converter, current mode, quadratic compensation slope, buck converter, high-voltage CMOS,
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A Near 1-V Operational, 0.18-µm CMOS Passive Sigma-Delta Modulator with 77 dB of Dyanamic Range Toru SAI Yasuhiro SUGIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2010/06/01 Vol. E93-C No. 6 pp. 747-754 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: passive sigma delta, low voltage, switched capacitor filter, correlated double sampling,
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A Digitally Assisted Gain and Offset Error Cancellation Technique for a CMOS Pipelined ADC with a 1.5-bit Bit-Block Architecture Hiroki SAKURAI Shigeto TANAKA Yasuhiro SUGIMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/10/01 Vol. E90-A No. 10 pp. 2272-2279 Type of Manuscript: PAPER Category: Analog Signal Processing Keyword: capacitor mismatch, CMOS pipelined ADC, 1.5-bit bit-blocks, averaging in digital domain, Oversampling ADC,
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A Study to Realize a 1-V Operational Passive Σ-Δ Modulator by Using a 90 nm CMOS Process Toru CHOI Tatsuya SAKAMOTO Yasuhiro SUGIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2007/06/01 Vol. E90-C No. 6 pp. 1304-1306 Type of Manuscript: Special Section LETTER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: sigma-delta modulator, 1-V operation, 90 nm CMOS process, second-order passive switched capacitor filter,
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The Realization of an Area-Efficient CMOS Bandgap Reference Circuit with Less than 1.25 V of Output Voltage Using a Fractional V_BE Amplification Scheme Hiroki SAKURAI Yasuhiro SUGIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2007/02/01 Vol. E90-C No. 2 pp. 499-506 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: voltage reference, low reference voltage, small diode area, V_BE amplification, CMOS,
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A Study to Realize a CMOS Pipelined Current-Mode A-to-D Converter for Video Applications Yasuhiro SUGIMOTO Yuji GOHDA Shigeto TANAKA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/06/01 Vol. E89-C No. 6 pp. 811-813 Type of Manuscript: Special Section LETTER (Special Section on Analog Circuit and Device Technologies) Category: Keyword: current-mode circuit, pipelined ADC, low-voltage, high-resolution,
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A 500-MHz and 60-dBΩ CMOS Transimpedance Amplifier Using the New Feedforward Stabilization Technique Shinya KAWADA Yasuhiro SUGIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/06/01 Vol. E88-C No. 6 pp. 1285-1287 Type of Manuscript: Special Section LETTER (Special Section on Analog Circuit and Device Technologies) Category: Optical Keyword: TIA, feedforward, CMOS, wideband,
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Analysis and Design of a Current-Mode PWM Buck Converter Adopting the Output-Voltage Independent Second-Order Slope Compensation Scheme Hiroki SAKURAI Yasuhiro SUGIMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/02/01 Vol. E88-A No. 2 pp. 490-497 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: PWM buck converter, current-mode control, slope compensation,
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A Bipolar ECL Comparator for a 4 GS/s and 6-Bit Flash A-to-D Converter Shinya KAWADA Yasuhiro SUGIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2004/06/01 Vol. E87-C No. 6 pp. 1022-1024 Type of Manuscript: Special Section LETTER (Special Section on Analog Circuit and Device Technologies) Category: Keyword: bipolar ECL, comparator circuit, GHz operation, high-speed ADC,
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FOREWORD Yasuhiro SUGIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2004/06/01 Vol. E87-C No. 6 pp. 839-839 Type of Manuscript: FOREWORD Category: Keyword:
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A 1 MHz, Synchronous, Step-down from 3.6 V to 1 V, PWM CMOS DC-DC Converter with more than 80% of Power Efficiency Yasuhiro SUGIMOTO Shinichi KOJIMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2004/03/01 Vol. E87-C No. 3 pp. 416-422 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: step-down DC-DC converter, 1 MHz operation, 1 V output, power efficiency, PWM,
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A Study of Effective Power-Reduction Methods for PDP Address-Driver ICs by Applying a Power-Dispersion Scheme Yuji SANO Akihiro TAKAGI Yasuhiro SUGIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2003/08/01 Vol. E86-C No. 8 pp. 1774-1781 Type of Manuscript: PAPER Category: Electronic Displays Keyword: plasma display, driver circuits, driver IC, power dissipation,
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The Design of a 2.7 V, 200 MS/s, and 14-Bit CMOS D/A Converter with 63 dB of SFDR Characteristics for the 90 MHz Output Signal Hiroki SAKURAI Yasuhiro SUGIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2003/06/01 Vol. E86-C No. 6 pp. 1077-1084 Type of Manuscript: Special Section PAPER (Special Issue on Devices and Circuits for Next Generation Multi-Media Communication Systems) Category: Keyword: high-speed DAC, low-voltage DAC, high-resolution DAC, CMOS DAC, SFDR characteristics,
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Low-Power and Low-Voltage Analog Circuit Techniques towards the 1 V Operation of Baseband and RF LSIs Yasuhiro SUGIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2002/08/01 Vol. E85-C No. 8 pp. 1529-1537 Type of Manuscript: INVITED PAPER (Special Issue on High-Performance Analog Integrated Circuits) Category: Keyword: low-power and low-voltage analog, sample-and-hold, VCO, DC-DC converter, 1 V operation,
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A 2 V, 500 MHz and 3 V, 920 MHz Low-Power Current-Mode 0.6 µm CMOS VCO Circuit Yasuhiro SUGIMOTO Hiroki UENO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1999/07/25 Vol. E82-C No. 7 pp. 1327-1329 Type of Manuscript: Special Section LETTER (Special Issue on Microwave and Millimeter Wave Technology) Category: Keyword: low voltage, high frequency, high performance, MOS analog, VCO,
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Design of a Sub-1. 5 V, 20 MHz, 0. 1% MOS Current-Mode Sample-and-Hold Circuit Yasuhiro SUGIMOTO Masahiro SEKIYA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1998/02/25 Vol. E81-A No. 2 pp. 258-260 Type of Manuscript: Special Section LETTER (Special Section on Analog Circuit Techniques in the Digital-Oriented Era) Category: Keyword: low voltage, high speed, high accuracy, MOS analog circuit, sample-and-hold circuit,
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FOREWORD Yasuhiro SUGIMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1998/02/25 Vol. E81-A No. 2 pp. 209-209 Type of Manuscript: FOREWORD Category: Keyword:
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A Study of the Signal-to-Noise Ratio of a High-Speed Current-Mode CMOS Sample-and-Hold Circuit Yasuhiro SUGIMOTO Masahiro SEKIYA Tetsuya IIDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1997/10/25 Vol. E80-A No. 10 pp. 1986-1993 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: signal-to-noise ratio, noise analysis, sample-and-hold circuit, current-mode circuit, MOS analog circuit,
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Design of a Low-Voltage, Low-Power, High-Frequency CMOS Current-Mode VCO Circuit by Using 0.6µm MOS Devices Yasuhiro SUGIMOTO Takeshi UENO Takaaki TSUJI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1997/02/25 Vol. E80-A No. 2 pp. 304-312 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques for System-on-Chip Integration) Category: Keyword: CMOS VCO, current-mode circuit, low voltage, low power, high-frequency,
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Study of a Low Voltage, Low Power and High Frequency CMOS VCO Circuit Yasuhiro SUGIMOTO Takaaki TSUJI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1996/05/25 Vol. E79-A No. 5 pp. 630-633 Type of Manuscript: Special Section LETTER (Special Section of Letters Selected from the 1995 Society Conference of IEICE) Category: Keyword: CMOS VCO circuit, high frequency VCO, currentcontrolled differential delay cell combined signal output,
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A Current-Mode Bit-Block Circuit Applicable to Low-Voltage, Low-Power Pipeline Video-Speed A/D Converters Yasuhiro SUGIMOTO Shunsaku TOKITO Hisao KAKITANI Eitaro SETA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1996/02/25 Vol. E79-A No. 2 pp. 199-209 Type of Manuscript: Special Section PAPER (Special Section on Analog Technologies in Submicron Era) Category: Keyword: ADC bit-block circuit, current-mode circuit, pipeline-type ADC, video-speed ADC, low voltage, low power,
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A Study of a MOS VCO Circuit by Using a Current–Controlled Differential Delay Cell Yasuhiro SUGIMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1994/11/25 Vol. E77-A No. 11 pp. 1929-1931 Type of Manuscript: Special Section LETTER (Special Section of Letters Selected from the 1994 IEICE Spring Conference) Category: Keyword: MOS analog circuit, PLL, VCO, current control, differential delay cell,
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High Performance and Versatile Bi-CMOS Electronic Volume IC Yasuhiro SUGIMOTO Hiromi MAFUNE Hiroshi SHIOBARA
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1988/04/25 Vol. E71-E No. 4 pp. 289-291 Type of Manuscript: Special Section LETTER (Special Issue: Papers from 1988 Spring Convention IEICE) Category: Semiconductor Devices and Integrated Circuits Keyword:
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