Yasuhiro KONISHI


Highly Flexible Row and Column Redundancy and Cycle Time Adaptive Read Data Path for Double Data Rate Synchronous Memories
Kiyohiro FURUTANI Takeshi HAMAMOTO Takeo MIKI Masaya NAKANO Takashi KONO Shigeru KIKUDA Yasuhiro KONISHI Tsutomu YOSHIHARA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/02/01
Vol. E88-C  No. 2  pp. 255-263
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
DRAMredundancyhigh speedhigh density
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Interface Technologies for Memories and ASICs -- Review and Future Direction --
Yasuhiro KONISHI Yasunobu NAKASE Katsushi ASAHINA Makoto TANIGUCHI Michihiro YAMADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/03/25
Vol. E82-C  No. 3  pp. 438-447
Type of Manuscript:  INVITED PAPER (Special Issue on Ultra-High-Speed IC and LSI Technology)
Category: 
Keyword: 
IO interfaceLVTTLSSTLSLDRAMD-RDRAMPCIAGPGTLHSTLLVDS
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Trends in High-Speed DRAM Architectures
Masaki KUMANOYA Toshiyuki OGAWA Yasuhiro KONISHI Katsumi DOSAKA Kazuhiro SHIMOTORI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/04/25
Vol. E79-C  No. 4  pp. 472-481
Type of Manuscript:  INVITED PAPER (Special Issue on Ultra-High-Speed LSIs)
Category: 
Keyword: 
reviewDRAMhigh-speed DRAMmain memorygraphics memoryperformance gapbandwidth bottleneckperformance comparisonhigh-speed I/O interfaceunified memorysystem integration
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A 180 MHz Multiple-Registered 16 Mbit SDRAM with Flexible Timing Scheme
Hisashi IWAMOTO Naoya WATANABE Akira YAMAZAKI Seiji SAWADA Yasumitsu MURAI Yasuhiro KONISHI Hiroshi ITOH Masaki KUMANOYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/08/25
Vol. E77-C  No. 8  pp. 1328-1333
Type of Manuscript:  Special Section PAPER (Special Section on High Speed and High Density Multi Functional LSI Memories)
Category: DRAM
Keyword: 
synchronous DRAMSDRAMhigh speed DRAMmultiple-register
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