IEICE Trans

Yasuaki INOUE

Accurate Nanopower Supply-Insensitive CMOS Unit V_th Extractor and αV_th Extractor with Continuous Variety Jing WANG Li DING Qiang LI Hirofumi SHINOHARA Yasuaki INOUE
Publication: Publication Date: 2017/05/01 Vol. E100-A No. 5 pp. 1145-1155 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: analog VLSI, CMOS, nanopower circuits, supply-insensitive, V_th extractor,
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An Adaptive Time-Step Control Method in Damped Pseudo-Transient Analysis for Solving Nonlinear DC Circuit Equations Xiao WU Zhou JIN Dan NIU Yasuaki INOUE
Publication: Publication Date: 2017/02/01 Vol. E100-A No. 2 pp. 619-628 Type of Manuscript: PAPER Category: Nonlinear Problems Keyword: pseudo transient analysis, step-control, DC operating points, switched evolution/relaxation,
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A 3.5ppm/°C 0.85V Bandgap Reference Circuit without Resistors Jing WANG Qiang LI Li DING Hirofumi SHINOHARA Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2016/07/01 Vol. E99-A No. 7 pp. 1430-1437 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: analog, bandgap reference, sub-1-V, voltage reference, supply-insensitive,
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An Effective Time-Step Control Method in Damped Pseudo-Transient Analysis for Solving Nonlinear DC Circuit Equations
Xiao WU Zhou JIN Dan NIU Yasuaki INOUE

Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/11/01
Vol. E98-A No. 11 pp. 2274-2282
Type of Manuscript: PAPER
Category: Nonlinear Problems
Keyword:
pseudo transient analysis, step-control, DC operating point, switched evolution/relaxation,

This Paper was withdrawn by the authors. The withdrawal procedure has been completed on July 19, 2016.

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An Effective Model of the Overshooting Effect for Multiple-Input Gates in Nanometer Technologies Li DING Zhangcai HUANG Atsushi KUROKAWA Jing WANG Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2014/05/01 Vol. E97-A No. 5 pp. 1059-1074 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: gate delay, overshooting effect, multiple-input gates, nanometer technology,
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Effective Implementation and Embedding Algorithms of CEPTA Method for Finding DC Operating Points Zhou JIN Xiao WU Dan NIU Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2013/12/01 Vol. E96-A No. 12 pp. 2524-2532 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Device and Circuit Modeling and Analysis Keyword: circuit simulation, nonlinear circuit, DC operating point, pseudo transient analysis, embedding position, SPICE,
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An Effective and Globally Convergent Newton Fixed-Point Homotopy Method for MOS Transistor Circuits Dan NIU Xiao WU Zhou JIN Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2013/09/01 Vol. E96-A No. 9 pp. 1848-1856 Type of Manuscript: PAPER Category: Circuit Theory Keyword: circuit simulation, nonlinear circuit, homotopy method, DC operating-point,
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A Globally Convergent Nonlinear Homotopy Method for MOS Transistor Circuits Dan NIU Kazutoshi SAKO Guangming HU Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2012/12/01 Vol. E95-A No. 12 pp. 2251-2260 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Device and Circuit Modeling and Analysis Keyword: DC operating point, nonlinear circuit, passivity, homotopy method, circuit simulation,
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A Non-Iterative Method for Calculating the Effective Capacitance of CMOS Gates with Interconnect Load Effect Minglu JIANG Zhangcai HUANG Atsushi KUROKAWA Qiang LI Bin LIN Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2011/05/01 Vol. E94-A No. 5 pp. 1201-1209 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: static timing analysis, gate delay, effective capacitance, non-iterative,
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Accurate Method for Calculating the Effective Capacitance with RC Loads Based on the Thevenin Model Minglu JIANG Zhangcai HUANG Atsushi KUROKAWA Shuai FANG Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/10/01 Vol. E92-A No. 10 pp. 2531-2539 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications) Category: Nonlinear Problems Keyword: static timing analysis, gate delay, effective capacitance, Thevenin model,
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A Highly Linear and Wide Input Range Four-Quadrant CMOS Analog Multiplier Using Active Feedback Zhangcai HUANG Minglu JIANG Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2009/06/01 Vol. E92-C No. 6 pp. 806-814 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: analog multiplier, analog signal processing, active feedback,
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A PN Junction-Current Model for Advanced MOSFET Technologies Ryosuke INAGAKI Norio SADACHIKA Mitiko MIURA-MATTAUSCH Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/04/01 Vol. E92-A No. 4 pp. 983-989 Type of Manuscript: Special Section PAPER (Special Section on Advanced Technologies Emerging Mainly from the 21st Workshop on Circuits and Systems in Karuizawa) Category: Keyword: HiSIM, PN junction current, diode current, surface potential,
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A 12-bit 3.7-Msample/s Pipelined A/D Converter Based on the Novel Capacitor Mismatch Calibration Technique Shuaiqi WANG Fule LI Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/09/01 Vol. E91-A No. 9 pp. 2465-2474 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications) Category: Electronic Circuits and Systems Keyword: A/D conversion, pipelined, capacitor mismatch calibration, low power dissipation,
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A Novel Expression of Spatial Correlation by a Random Curved Surface Model and Its Application to LSI Design Shin-ichi OHKAWA Hiroo MASUDA Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/04/01 Vol. E91-A No. 4 pp. 1062-1070 Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 20th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: LSI design, device variation, random curved surface, Gaussian, systematic part,
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An Energy Management Circuit for Self-Powered Ubiquitous Sensor Modules Using Vibration-Based Energy Jun PAN Yasuaki INOUE Zheng LIANG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/10/01 Vol. E90-A No. 10 pp. 2116-2123 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications) Category: Nonlinear Circuits Keyword: ubiquitous, sensor module, energy management, two-tank, vibration, battery-free,
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An Effective SPICE3 Implementation of the Compound Element Pseudo-Transient Algorithm Hong YU Yasuaki INOUE Kazutoshi SAKO Xiaochuan HU Zhangcai HUANG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/10/01 Vol. E90-A No. 10 pp. 2124-2131 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications) Category: Nonlinear Circuits Keyword: pseudo-transient analysis, compound element, DC operating point, SPICE3 implementation, Jacobian matrix,
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A Low-Power Sub-1-V Low-Voltage Reference Using Body Effect Jun PAN Yasuaki INOUE Zheng LIANG Zhangcai HUANG Weilun HUANG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/04/01 Vol. E90-A No. 4 pp. 748-755 Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 19th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: low-power, low-voltage, CMOS, reference, body effect, temperature coefficient, back-gate,
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Behavioral Circuit Macromodeling and Analog LSI Implementation for Automobile Engine Intake System Zhangcai HUANG Yasuaki INOUE Hong YU Jun PAN Yun YANG Quan ZHANG Shuai FANG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/04/01 Vol. E90-A No. 4 pp. 732-740 Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 19th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: automobile engine intake system, analog LSI implementation, behavioral circuit macromodeling,
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An Effective Pseudo-Transient Algorithm for Finding DC Solutions of Nonlinear Circuits Hong YU Yasuaki INOUE Yuki MATSUYA Zhangcai HUANG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/10/01 Vol. E89-A No. 10 pp. 2724-2731 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications) Category: Modelling, Systems and Simulation Keyword: pseudo-transient analysis, DC operating-point, nonlinear circuit, compound pseudo-element,
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A 15-bit 10-Msample/s Pipelined A/D Converter Based on Incomplete Settling Principle Shuaiqi WANG Fule LI Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/10/01 Vol. E89-A No. 10 pp. 2732-2739 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications) Category: Modelling, Systems and Simulation Keyword: A/D conversion, pipelined, incomplete settling, low power dissipation,
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Determination of Interconnect Structural Parameters for Best- and Worst-Case Delays Atsushi KUROKAWA Hiroo MASUDA Junko FUJII Toshinori INOSHITA Akira KASEBE Zhangcai HUANG Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/04/01 Vol. E89-A No. 4 pp. 856-864 Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: interconnect, worst-case delay, static timing analysis, process variation, capacitance extraction,
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Formula-Based Method for Capacitance Extraction of Interconnects with Dummy Fills Atsushi KUROKAWA Akira KASEBE Toshiki KANAMOTO Yun YANG Zhangcai HUANG Yasuaki INOUE Hiroo MASUDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/04/01 Vol. E89-A No. 4 pp. 847-855 Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: dummy fill, capacitance extraction, capacitance formula, interconnect,
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Modeling the Influence of Input-to-Output Coupling Capacitance on CMOS Inverter Delay Zhangcai HUANG Atsushi KUROKAWA Yun YANG Hong YU Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/04/01 Vol. E89-A No. 4 pp. 840-846 Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: CMOS inverter, overshooting effect, deep submicron, timing analysis,
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Efficient Large Scale Integration Power/Ground Network Optimization Based on Grid Genetic Algorithm Yun YANG Atsushi KUROKAWA Yasuaki INOUE Wenqing ZHAO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/12/01 Vol. E88-A No. 12 pp. 3412-3420 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Power/Ground Network Keyword: SLP algorithm, GGA method, P/G network optimization, global optimum,
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Modeling the Effective Capacitance of Interconnect Loads for Predicting CMOS Gate Slew Zhangcai HUANG Atsushi KUROKAWA Jun PAN Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/12/01 Vol. E88-A No. 12 pp. 3367-3374 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Prediction and Analysis Keyword: static timing analysis, gate slew, CMOS inverter, effective capacitance, interconnect loads,
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Second-Order Polynomial Expressions for On-Chip Interconnect Capacitance Atsushi KUROKAWA Masanori HASHIMOTO Akira KASEBE Zhangcai HUANG Yun YANG Yasuaki INOUE Ryosuke INAGAKI Hiroo MASUDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/12/01 Vol. E88-A No. 12 pp. 3453-3462 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Interconnect Keyword: capacitance formula, capacitance calculation, capacitance extraction, interconnect capacitance,
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Efficient Dummy Filling Methods to Reduce Interconnect Capacitance and Number of Dummy Metal Fills Atsushi KUROKAWA Toshiki KANAMOTO Tetsuya IBE Akira KASEBE Wei Fong CHANG Tetsuro KAGE Yasuaki INOUE Hiroo MASUDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/12/01 Vol. E88-A No. 12 pp. 3471-3478 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Interconnect Keyword: dummy metal, dummy fill, interconnect capacitance, CMP,
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A Practical Approach for Efficiently Extracting Interconnect Capacitances with Floating Dummy Fills Atsushi KUROKAWA Toshiki KANAMOTO Akira KASEBE Yasuaki INOUE Hiroo MASUDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/11/01 Vol. E88-A No. 11 pp. 3180-3187 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: dummy fill, dummy metal, capacitance extraction, interconnect capacitance,
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An Efficient Homotopy Method for Finding DC Operating Points of Nonlinear Circuits Yu IMAI Kiyotaka YAMAMURA Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/10/01 Vol. E88-A No. 10 pp. 2554-2561 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications) Category: Keyword: circuit simulation, DC operating point analysis, nonlinear circuit, homotopy method,
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A Novel Model for Computing the Effective Capacitance of CMOS Gates with Interconnect Loads Zhangcai HUANG Atsushi KUROKAWA Yasuaki INOUE Junfa MAO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/10/01 Vol. E88-A No. 10 pp. 2562-2569 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications) Category: Keyword: static timing analysis, gate delay, CMOS inverter, effective capacitance, interconnect loads,
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A Homotopy Method Using a Nonlinear Auxiliary Function for Solving Transistor Circuits Yasuaki INOUE Yu IMAI Kiyotaka YAMAMURA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2005/07/01 Vol. E88-D No. 7 pp. 1401-1408 Type of Manuscript: Special Section PAPER (Special Section on Recent Advances in Circuits and Systems--Part 1) Category: General and Nonlinear Circuits and Systems Keyword: circuit simulation, circuit analysis, homotopy method, auxiliary function, transistor circuit,
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Path Following Circuits--SPICE-Oriented Numerical Methods Where Formulas are Described by Circuits-- Kiyotaka YAMAMURA Wataru KUROKI Hideaki OKUMA Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/04/01 Vol. E88-A No. 4 pp. 825-831 Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 17th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: circuit simulator, SPICE, nonlinear equation, homotopy method, optimization problem,
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An Initial Solution Algorithm for Globally Convergent Homotopy Methods Yasuaki INOUE Saeko KUSANOBU Kiyotaka YAMAMURA Makoto ANDO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/04/01 Vol. E87-A No. 4 pp. 780-786 Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 16th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: nonlinear circuit, circuit simulation, homotopy method, initial solution, unique solution,
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Theorems on the Unique Initial Solution for Globally Convergent Homotopy Methods Yasuaki INOUE Saeko KUSANOBU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/09/01 Vol. E86-A No. 9 pp. 2184-2191 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications) Category: Numerical Calculation Keyword: nonlinear circuit, circuit analysis, homotopy method, initial solution, unique solution,
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A Practical Approach for the Fixed-Point Homotopy Method Using a Solution-Tracing Circuit Yasuaki INOUE Saeko KUSANOBU Kiyotaka YAMAMURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/01/01 Vol. E85-A No. 1 pp. 222-233 Type of Manuscript: PAPER Category: Nonlinear Problems Keyword: homotopy method, fixed-point homotopy, DC operating-point, circuit simulation, SPICE,
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Finding All Solutions of Nonlinear Equations Using Inverses of Approximate Jacobian Matrices Kiyotaka YAMAMURA Takayoshi KUMAKURA Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/11/01 Vol. E84-A No. 11 pp. 2950-2952 Type of Manuscript: LETTER Category: Nonlinear Problems Keyword: interval analysis, nonlinear equations, finding all solutions, numerical computation with guaranteed accuracy,
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