IEICE Trans

Xuan ZENG

Efficient Statistical Timing Analysis for Circuits with Post-Silicon Tunable Buffers Xingbao ZHOU Fan YANG Hai ZHOU Min GONG Hengliang ZHU Ye ZHANG Xuan ZENG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2014/11/01 Vol. E97-A No. 11 pp. 2227-2235 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: Post-Silicon Tunable buffer, statistical timing analysis, stochastic collocation, sparse grid,
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Yield-Driven Clock Skew Scheduling for Arbitrary Distributions of Critical Path Delays Yanling ZHI Wai-Shing LUK Yi WANG Changhao YAN Xuan ZENG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2012/12/01 Vol. E95-A No. 12 pp. 2172-2181 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Physical Level Design Keyword: yield-driven, clock skew scheduling, generalized Howard algorithm, generalized minimum balance algorithm,
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Stochastic Non-homogeneous Arnoldi Method for Analysis of On-Chip Power Grid Networks under Process Variations Zhihua GUI Fan YANG Xuan ZENG
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/04/01 Vol. E94-C No. 4 pp. 504-510 Type of Manuscript: Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration) Category: Keyword: process variation, power grid, non-homogeneous, ARnoldi,
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Stochastic Sparse-Grid Collocation Algorithm for Steady-State Analysis of Nonlinear System with Process Variations Jun TAO Xuan ZENG Wei CAI Yangfeng SU Dian ZHOU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/06/01 Vol. E93-A No. 6 pp. 1204-1214 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: stochastic collocation algorithm, sparse grid, steady-state analysis, process variations,
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Intra-Die Spatial Correlation Extraction with Maximum Likelihood Estimation Method for Multiple Test Chips Qiang FU Wai-Shing LUK Jun TAO Xuan ZENG Wei CAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/12/01 Vol. E92-A No. 12 pp. 3007-3015 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Device and Circuit Modeling and Analysis Keyword: intra-die variations, spatial correlation, maximum likelihood estimation,
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A Modified Nested Sparse Grid Based Adaptive Stochastic Collocation Method for Statistical Static Timing Analysis Xu LUO Fan YANG Xuan ZENG Jun TAO Hengliang ZHU Wei CAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/12/01 Vol. E92-A No. 12 pp. 3024-3034 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Device and Circuit Modeling and Analysis Keyword: process variations, statistical static timing analysis, extended Gauss-Hermite quadrature, nested sparse grid, stochastic collocation method,
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Characterizing Intra-Die Spatial Correlation Using Spectral Density Fitting Method Qiang FU Wai-Shing LUK Jun TAO Changhao YAN Xuan ZENG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/07/01 Vol. E92-A No. 7 pp. 1652-1659 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: intra-die variations, spatial correlation, correlation function, spectral density,
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Generalized Stochastic Collocation Method for Variation-Aware Capacitance Extraction of Interconnects Considering Arbitrary Random Probability Hengliang ZHU Xuan ZENG Xu LUO Wei CAI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2009/04/01 Vol. E92-C No. 4 pp. 508-516 Type of Manuscript: Special Section PAPER (Special Section on Low-Leakage, Low-Voltage, Low-Power and High-Speed Technologies for System LSIs in Deep-Submicron Era) Category: Keyword: variation-aware capacitance extraction, geometric variations, generalized polynomial chaos,
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Adaptive Stochastic Collocation Method for Parameterized Statistical Timing Analysis with Quadratic Delay Model Yi WANG Xuan ZENG Jun TAO Hengliang ZHU Wei CAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/12/01 Vol. E91-A No. 12 pp. 3465-3473 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Device and Circuit Modeling and Analysis Keyword: statistical timing analysis, adaptive stochastic collocation method, process variations,
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