Xingbao ZHOU


Efficient Statistical Timing Analysis for Circuits with Post-Silicon Tunable Buffers
Xingbao ZHOU Fan YANG Hai ZHOU Min GONG Hengliang ZHU Ye ZHANG Xuan ZENG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/11/01
Vol. E97-A  No. 11  pp. 2227-2235
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
Post-Silicon Tunable bufferstatistical timing analysisstochastic collocationsparse grid
 Summary | Full Text:PDF