Power-Rail ESD Clamp Circuit with Parasitic-BJT and Channel Parallel Shunt Paths to Achieve Enhanced Robustness
Yuan WANG Guangyi LU Yize WANG Xing ZHANG 
Publication Date: 2017/03/01
Vol. E100-C  No. 3  pp. 344-347
Type of Manuscript:  BRIEF PAPER
Category: Semiconductor Materials and Devices
electrostatic discharge (ESD)robustnessfalse-triggering immunitytransmission-line-pulsing (TLP) test
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Optimization on Layout Strategy of Gate-Grounded NMOS for On-Chip ESD Protection in a 65-nm CMOS Process
Guangyi LU Yuan WANG Xing ZHANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/05/01
Vol. E99-C  No. 5  pp. 590-596
Type of Manuscript:  PAPER
Category: Integrated Electronics
electrostatic discharge (ESD)gate-grounded NMOS (ggNMOS)substrate-pickup stripestransmission-line-pulsing (TLP) test
 Summary | Full Text:PDF(1.7MB)

Novel DEM Technique for Current-Steering DAC in 65-nm CMOS Technology
Yuan WANG Wei SU Guangliang GUO Xing ZHANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2015/12/01
Vol. E98-C  No. 12  pp. 1193-1195
Type of Manuscript:  BRIEF PAPER
Category: Electronic Circuits
dynamic element matching (DEM)current-steering digital-to-analog converter (DAC)spurious free dynamic range (SFDR)
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Salient Region Detection Based on Color Uniqueness and Color Spatial Distribution
Xing ZHANG Keli HU Lei WANG Xiaolin ZHANG Yingguan WANG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2014/07/01
Vol. E97-D  No. 7  pp. 1933-1936
Type of Manuscript:  LETTER
Category: Image Recognition, Computer Vision
visual attentionsaliency mapcolor uniquenesscolor spatial distribution
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A Low Cost Correlator Structure in the Pseudo-Noise Code Acquisition System
WeiJun LU Ying LI DunShan YU Xing ZHANG 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2009/05/01
Vol. E92-B  No. 5  pp. 1888-1891
Type of Manuscript:  LETTER
Category: Devices/Circuits for Communications
low cost correlatoracquisition
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Atomistic Simulation of RTA Annealing for Shallow Junction Formation Characterizing both BED and TED
Min YU Ru HUANG Xing ZHANG Yangyuan WANG Hideki OKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/03/01
Vol. E86-C  No. 3  pp. 295-300
Type of Manuscript:  Special Section PAPER (Special Issue on the 2002 IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD'02))
atomistic modelsimulationBEDTED
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