Xiaochun LI


Timing-Driven Placement Based on Path Topology Analysis
Feng CHENG Junfa MAO Xiaochun LI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/08/01
Vol. E88-A  No. 8  pp. 2227-2230
Type of Manuscript:  LETTER
Category: VLSI Design Technology and CAD
Keyword: 
timing-driven placementinterconnectdelaycritical path
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