Xiangqiu YU


A Study for Testability of Redundant Faults in Combinational Circuits Using Delay Effects
Xiangqiu YU Hiroshi TAKAHASHI Yuzo TAKAMATSU 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1995/07/25
Vol. E78-D  No. 7  pp. 822-829
Type of Manuscript:  Special Section PAPER (Special Issue on Verification, Test and Diagnosis of VLSI Systems)
Category: 
Keyword: 
test generationcombinational circuitsredundant faultsdelay effectextended seven-valued calculus
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