IEICE Trans

Wei DENG

A 28-GHz Fractional-N Frequency Synthesizer with Reference and Frequency Doublers for 5G Mobile Communications in 65nm CMOS Hanli LIU Teerachot SIRIBURANON Kengo NAKATA Wei DENG Ju Ho SON Dae Young LEE Kenichi OKADA Akira MATSUZAWA
Publication: Publication Date: 2018/04/01 Vol. E101-C No. 4 pp. 187-196 Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology) Category: Keyword: 5G communications, CMOS, 28GHz, fractional-N frequency synthesizer, phase noise, spur,
	Summary \| Full Text:PDF(2MB)

A Fully-Synthesizable 10.06Gbps 16.1mW Injection-Locked CDR in 28nm FDSOI Aravind THARAYIL NARAYANAN Wei DENG Dongsheng YANG Rui WU Kenichi OKADA Akira MATSUZAWA
Publication: Publication Date: 2017/03/01 Vol. E100-C No. 3 pp. 259-267 Type of Manuscript: Special Section PAPER (Special Section on Low-Power and High-Speed Chips) Category: Keyword: fully-synthesizable, all-digital, clock data recovery, injection locking, phase-filtering,
	Summary \| Full Text:PDF(3.8MB)

A 0.0055mm² 480µW Fully Synthesizable PLL Using Stochastic TDC in 28nm FDSOI Dongsheng YANG Tomohiro UENO Wei DENG Yuki TERASHIMA Kengo NAKATA Aravind Tharayil NARAYANAN Rui WU Kenichi OKADA Akira MATSUZAWA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2016/06/01 Vol. E99-C No. 6 pp. 632-640 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: AD-PLL, synthesizable, stochastic TDC, standard cell, automatic place-and-route,
	Summary \| Full Text:PDF(2MB)

A Constant-Current-Controlled Class-C Voltage-Controlled Oscillator using Self-Adjusting Replica Bias Circuit Teerachot SIRIBURANON Wei DENG Kenichi OKADA Akira MATSUZAWA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2015/06/01 Vol. E98-C No. 6 pp. 471-479 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: low power, low phase noise, class-C VCO, start-up, CMOS, replica-bias circuit,
	Summary \| Full Text:PDF(1.5MB)

A 60-GHz CMOS Transmitter with Gain-Enhanced On-Chip Antenna for Short-Range Wireless Interconnections Rui WU Wei DENG Shinji SATO Takuichi HIRANO Ning LI Takeshi INOUE Hitoshi SAKANE Kenichi OKADA Akira MATSUZAWA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2015/04/01 Vol. E98-C No. 4 pp. 304-314 Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design---Architecture, Circuit, Device and Design Methodology) Category: Keyword: 60-GHz transmitter, CMOS, on-chip antenna, helium-3 ion irradiation, short-range, high-data-rate,
	Summary \| Full Text:PDF(2.2MB)

A 20 GHz Push-Push Voltage-Controlled Oscillator Using Second-Harmonic Peaking Technique for a 60 GHz Frequency Synthesizer Teerachot SIRIBURANON Takahiro SATO Ahmed MUSA Wei DENG Kenichi OKADA Akira MATSUZAWA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2013/06/01 Vol. E96-C No. 6 pp. 804-812 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: low phase noise, low power, tail-current modulation, impulse sensitivity function, super-harmonic coupled QVCO, push-push VCO,
	Summary \| Full Text:PDF(2.2MB)

A 0.5-V, 0.05-to-3.2 GHz LC-Based Clock Generator for Substituting Ring Oscillators under Low-Voltage Condition Wei DENG Kenichi OKADA Akira MATSUZAWA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2012/07/01 Vol. E95-C No. 7 pp. 1285-1296 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: 0.5-V, clock generator, frequency extension, low-jitter, LC-VCO,
	Summary \| Full Text:PDF(2.6MB)