IEICE Trans

Tsuyoshi ISSHIKI

Design Verification Methodology of Pipelined RISC-V Processor Using C2RTL Framework Eiji YOSHIYA Tomoya NAKANISHI Tsuyoshi ISSHIKI
Publication: Publication Date: 2022/07/01 Vol. E105-A No. 7 pp. 1061-1069 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: IoT, processor, RISC-V, RTL, C++,
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HOG-Based Object Detection Processor Design Using ASIP Methodology Shanlin XIAO Tsuyoshi ISSHIKI Dongju LI Hiroaki KUNIEDA
Publication: Publication Date: 2017/12/01 Vol. E100-A No. 12 pp. 2972-2984 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: ASIP, histogram of oriented gradients (HOG), embedded processor, computer vision, object detection,
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Design of an Application Specific Instruction Set Processor for Real-Time Object Detection Using AdaBoost Algorithm Shanlin XIAO Tsuyoshi ISSHIKI Dongju LI Hiroaki KUNIEDA
Publication: Publication Date: 2017/07/01 Vol. E100-A No. 7 pp. 1384-1395 Type of Manuscript: Special Section PAPER (Special Section on Design Methodologies for System on a Chip) Category: Keyword: ASIP, embedded processor, computer vision, object detection, AdaBoost,
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Narrow Fingerprint Template Synthesis by Clustering Minutiae Descriptors Zhiqiang HU Dongju LI Tsuyoshi ISSHIKI Hiroaki KUNIEDA
Publication: Publication Date: 2017/06/01 Vol. E100-D No. 6 pp. 1290-1302 Type of Manuscript: PAPER Category: Pattern Recognition Keyword: narrow swipe sensor, fuzzy c-means, fingerprint verification, minutiae descriptor, fingerprint template improvement,
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Hybrid Minutiae Descriptor for Narrow Fingerprint Verification Zhiqiang HU Dongju LI Tsuyoshi ISSHIKI Hiroaki KUNIEDA
Publication: Publication Date: 2017/03/01 Vol. E100-D No. 3 pp. 546-555 Type of Manuscript: PAPER Category: Pattern Recognition Keyword: narrow swipe sensor, fingerprint verification, hybrid minutiae descriptor, Gabor feature,
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Register-Based Process Virtual Machine Acceleration Using Hardware Extension with Hybrid Execution Surachai THONGKAEW Tsuyoshi ISSHIKI Dongju LI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2015/12/01 Vol. E98-A No. 12 pp. 2505-2518 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: High-Level Synthesis and System-Level Design Keyword: register-base VM acceleration, dalvik VM acceleration, HW/SW co-designed VM, dynamic languages,
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Retargeting Derivative-ASIP with Assembly Converter Tool Agus BEJO Dongju LI Tsuyoshi ISSHIKI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2014/05/01 Vol. E97-D No. 5 pp. 1188-1195 Type of Manuscript: PAPER Category: Computer System Keyword: derivative ASIP, retargeting compiler, LISA,
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A Design of High Performance Parallel Architecture and Communication for Multi-ASIP Based Image Processing Engine Hsuan-Chun LIAO Mochamad ASRI Tsuyoshi ISSHIKI Dongju LI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2013/06/01 Vol. E96-A No. 6 pp. 1222-1235 Type of Manuscript: Special Section PAPER (Special Section on Circuit, System, and Computer Technologies) Category: Keyword: ASIP, image processing,
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A High Level Design of Reconfigurable and High-Performance ASIP Engine for Image Signal Processing Hsuan-Chun LIAO Mochamad ASRI Tsuyoshi ISSHIKI Dongju LI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2012/12/01 Vol. E95-A No. 12 pp. 2373-2383 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: High-Level Synthesis and System-Level Design Keyword: ASIP, image processing,
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A Low-Cost and Energy-Efficient Multiprocessor System-on-Chip for UWB MAC Layer Hao XIAO Tsuyoshi ISSHIKI Arif Ullah KHAN Dongju LI Hiroaki KUNIEDA Yuko NAKASE Sadahiro KIMURA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2012/08/01 Vol. E95-D No. 8 pp. 2027-2038 Type of Manuscript: PAPER Category: Computer System Keyword: multiprocessor system-on-chip (MPSoC), ultra-wideband (UWB), medium access control (MAC), shared-memory,
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Narrow Fingerprint Sensor Verification with Template Updating Technique SangWoo SIN Ru ZHOU Dongju LI Tsuyoshi ISSHIKI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2012/01/01 Vol. E95-A No. 1 pp. 346-353 Type of Manuscript: PAPER Category: Algorithms and Data Structures Keyword: fingerprint, biometric, verification, template updating, narrow fingerprint sensor,
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Practical Orientation Field Estimation for Embedded Fingerprint Recognition Systems Yukun LIU Dongju LI Tsuyoshi ISSHIKI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2011/09/01 Vol. E94-D No. 9 pp. 1792-1799 Type of Manuscript: PAPER Category: Pattern Recognition Keyword: fingerprint recognition, orientation field, binary pattern, embedded system,
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Unique Fingerprint-Image-Generation Algorithm for Line Sensors Hao NI Dongju LI Tsuyoshi ISSHIKI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2011/02/01 Vol. E94-A No. 2 pp. 781-788 Type of Manuscript: PAPER Category: Image Keyword: biometrics, fingerprint, line sensor, reconstruction, equidistant,
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Orientation Field Estimation for Embedded Fingerprint Authentication System Wei TANG Dongju LI Tsuyoshi ISSHIKI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2010/07/01 Vol. E93-D No. 7 pp. 1918-1926 Type of Manuscript: PAPER Category: Pattern Recognition Keyword: orientation field, fingerprint authentication, feature extraction, binary pattern, image processing,
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Entropy Decoding Processor for Modern Multimedia Applications Sumek WISAYATAKSIN Dongju LI Tsuyoshi ISSHIKI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/12/01 Vol. E92-A No. 12 pp. 3248-3257 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Embedded, Real-Time and Reconfigurable Systems Keyword: variable length code, application specific processor, entropy decoding engine, MPEG-2, MPEG-4, AAC, H.264/AVC,
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Decomposition of Task-Level Concurrency on C Programs Applied to the Design of Multiprocessor SoC Mohammad ZALFANY URFIANTO Tsuyoshi ISSHIKI Arif ULLAH KHAN Dongju LI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/07/01 Vol. E91-A No. 7 pp. 1748-1756 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: task-level concurrency, hybrid dataflow, C language, multiprocessor system-on-chips,
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A Multiprocessor SoC Architecture with Efficient Communication Infrastructure and Advanced Compiler Support for Easy Application Development Mohammad ZALFANY URFIANTO Tsuyoshi ISSHIKI Arif ULLAH KHAN Dongju LI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/04/01 Vol. E91-A No. 4 pp. 1185-1196 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: multiprocessor-on-a-chip, system-on-chips, crossbar interconnect, VLSI,
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Low Cost SoC Design of H.264/AVC Decoder for Handheld Video Player Sumek WISAYATAKSIN Dongju LI Tsuyoshi ISSHIKI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/04/01 Vol. E91-A No. 4 pp. 1197-1205 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: platform-based SoC, LSI design, H.264/AVC standard, mobile application,
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A Fingerprint Matching Using Minutia Ridge Shape for Low Cost Match-on-Card Systems Andy SURYA RIKIN Dongju LI Tsuyoshi ISSHIKI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/05/01 Vol. E88-A No. 5 pp. 1305-1312 Type of Manuscript: PAPER Category: Digital Signal Processing Keyword: biometrics, fingerprint, minutiae matching, minutia ridge shape, smart card, match-on-card,
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Fast Fingerprint Classification Based on Direction Pattern Jinqing QI Dongju LI Tsuyoshi ISSHIKI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/08/01 Vol. E87-A No. 8 pp. 1887-1892 Type of Manuscript: Special Section PAPER (Special Section on Digital Signal Processing) Category: Image/Visual Signal Processing Keyword: fingerprint classification, direction pattern, embedded system,
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Binary Line-Pattern Algorithm for Embedded Fingerprint Authentication System Jinqing QI Dongju LI Tsuyoshi ISSHIKI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/08/01 Vol. E87-A No. 8 pp. 1879-1886 Type of Manuscript: Special Section PAPER (Special Section on Digital Signal Processing) Category: Image/Visual Signal Processing Keyword: fingerprint authentication, line-pattern, embedded system,
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New Rate Control Method with Minimum Skipped Frames for Very Low Delay in H.263+ Codec Trio ADIONO Tsuyoshi ISSHIKI Chawalit HONSAWEK Kazuhito ITO Dongju LI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/06/01 Vol. E85-A No. 6 pp. 1396-1407 Type of Manuscript: PAPER Category: Image Keyword: H.263+, rate control, optimum bit allocation, low encoder-decoder delay, lip synchronization,
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System-MSPA Design of H.263+ Video Encoder/Decoder LSI for Videotelephony Applications Chawalit HONSAWEK Kazuhito ITO Tomohiko OHTSUKA Trio ADIONO Dongju LI Tsuyoshi ISSHIKI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/11/01 Vol. E84-A No. 11 pp. 2614-2622 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: VLSI Design Keyword: system-MSPA, LSI design, videotelephony applications, H.263+ ITU standard,
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A New FPGA Architecture for High Performance Bit-Serial Pipeline Datapath Akihisa OHTA Tsuyoshi ISSHIKI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2000/08/25 Vol. E83-A No. 8 pp. 1663-1672 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: FPGA, bit-serial, logic block architecture, routing architecture, logic utilization, Rent's rule, chip scalability,
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Routability Analysis of Bit-Serial Pipeline Datapaths Tsuyoshi ISSHIKI Wayne Wei-Ming DAI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1997/10/25 Vol. E80-A No. 10 pp. 1861-1870 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: bit-serial pipeline, Rent's rule, routability, FPGA,
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Instruction Sequence Based Synthesis for Application Specific Micro-Architecture Kyung-Sik JANG Tsuyoshi ISSHIKI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1997/06/25 Vol. E80-A No. 6 pp. 1021-1032 Type of Manuscript: Special Section PAPER (Special Section of Papers Selected from 1996 International Technical Conference on Circuits/Systems, Computers and Communications(ITC-CSCC'96)) Category: Keyword: instruction based synthesis, micro-architecture, applification specific instruction processor,
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Parallel Processing Architecture Design for Two-Dimensional Image Processing Using Spatial Expansion of the Signal Flow Graph Tsuyoshi ISSHIKI Yoshinori TAKEUCHI Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1993/03/25 Vol. E76-A No. 3 pp. 337-348 Type of Manuscript: Special Section PAPER (Special Section on the 5th Karuizawa Workshop on Circuits and Systems) Category: Keyword: architecture design, spatial expansion of SFG, pixel SFG, frame SFG,
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Two-Dimensional Quadrilateral Recursive Digital Filters with Parallel Structure--Synthesis and Parallel Processing-- Tsuyoshi ISSHIKI Hiroaki KUNIEDA Mineo KANEKO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1992/03/25 Vol. E75-A No. 3 pp. 352-361 Type of Manuscript: Special Section PAPER (Special Section on the 4th Karuizawa Workshop on Circuits and Systems) Category: Keyword: quadrilateral recursive filters, parallel processing,
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