Toshiro AKINO


FOREWORD
Takashi MITSUHASHI Toshiro AKINO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/12/01
Vol. E85-A  No. 12  pp. 2567-2567
Type of Manuscript:  FOREWORD
Category: 
Keyword: 
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WSSA: A High Performance Simulated Annealing and Its Application to Transistor Placement
Shunji SAIKA Masahiro FUKUI Masahiko TOYONAGA Toshiro AKINO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/12/25
Vol. E83-A  No. 12  pp. 2584-2591
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Layout Synthesis
Keyword: 
simulated annealingtemperature schedulingphase transitionplacement optimizationcell synthesis
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Layout Abstraction and Technology Retargeting for Leaf Cells
Masahiro FUKUI Noriko SHINOMIYA Syunji SAIKA Toshiro AKINO Shigeo KUNINOBU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/12/25
Vol. E81-A  No. 12  pp. 2492-2500
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Layout Optimization
Keyword: 
technology retargetinglayout abstractionlayout synthesiscell synthesis
 Summary | Full Text:PDF

A Two-Dimensional Transistor Placement Algorithm for Cell Synthesis and Its Application to Standard Cells
Shunji SAIKA Masahiro FUKUI Noriko SHINOMIYA Toshiro AKINO Shigeo KUNINOBU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/10/25
Vol. E80-A  No. 10  pp. 1883-1891
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
cell layoutcell synthesistransistor placementtwo-dimensional placement
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A Multi-Layer Channel Router Using Simulated Annealing
Masahiko TOYONAGA Chie IWASAKI Yoshiaki SAWADA Toshiro AKINO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1994/12/25
Vol. E77-A  No. 12  pp. 2085-2091
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
channel routersimulated annealinglayer assignmentcompaction
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A New Approach of Fractal-Analysis Based Module Clustering for VLSI Placement
Masahiko TOYONAGA Shih-Tsung YANG Isao SHIRAKAWA Toshiro AKINO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1994/12/25
Vol. E77-A  No. 12  pp. 2045-2052
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
clusteringfractal analysisplacementpartitioning
 Summary | Full Text:PDF

FOREWORD
Toshiro AKINO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1994/12/25
Vol. E77-A  No. 12  pp. 1987-1987
Type of Manuscript:  FOREWORD
Category: 
Keyword: 
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Placement Optimization by Trembling Spot-Check
Masahiko TOYONAGA Hiroaki OKUDE Toshiro AKINO 
Publication:   IEICE TRANSACTIONS (1976-1990)
Publication Date: 1989/12/25
Vol. E72-E  No. 12  pp. 1350-1359
Type of Manuscript:  Special Section PAPER (Special Issue on the 2nd Karuizawa Workshop on Circuits and Systems)
Category: VLSI Design Technology
Keyword: 
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