IEICE Trans

Toshinobu KASHIWABARA

Satisfiability Checking for Logic with Equality and Uninterpreted Functions under Equivalence Constraints Hiroaki KOZAWA Kiyoharu HAMAGUCHI Toshinobu KASHIWABARA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/12/01 Vol. E90-A No. 12 pp. 2778-2789 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Logic Synthesis and Verification Keyword: equivalence checking, logic with equality and uninterpreted functions, equivalence constraint, satisfiability checking,
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Expressive Power of Quantum Pushdown Automata with Classical Stack Operations under the Perfect-Soundness Condition Masaki NAKANISHI Kiyoharu HAMAGUCHI Toshinobu KASHIWABARA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2006/03/01 Vol. E89-D No. 3 pp. 1120-1127 Type of Manuscript: PAPER Category: Computation and Computational Models Keyword: quantum pushdown automata, quantum computation model, context-free-language,
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Verifying Signal-Transition Consistency of High-Level Designs Based on Symbolic Simulation Kiyoharu HAMAGUCHI Hidekazu URUSHIHARA Toshinobu KASHIWABARA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2002/10/01 Vol. E85-D No. 10 pp. 1587-1594 Type of Manuscript: Special Section PAPER (Special Issue on Test and Verification of VLSI) Category: Verification Keyword: formal verification, high-level design verification, uninterpreted function, co-design verification,
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On-Line Edge-Coloring Algorithms for Degree-Bounded Bipartite Graphs Masakuni TAKI Mikihito SUGIURA Toshinobu KASHIWABARA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/05/01 Vol. E85-A No. 5 pp. 1062-1065 Type of Manuscript: Special Section LETTER (Special Section on Discrete Mathematics and Its Applications) Category: Keyword: on-line algorithm, randomization, edge-coloring,
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On the Power of Non-deterministic Quantum Finite Automata Masaki NAKANISHI Takao INDOH Kiyoharu HAMAGUCHI Toshinobu KASHIWABARA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2002/02/01 Vol. E85-D No. 2 pp. 327-332 Type of Manuscript: Special Section PAPER (Special Issue on Selected Papers from LA Symposium) Category: Keyword: quantum computation, quantum finite automaton, non-deterministic finite automaton, regular language,
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A Partially Explicit Method for Efficient Symbolic Checking of Language Containment Kiyoharu HAMAGUCHI Michiyo ICHIHARA Toshinobu KASHIWABARA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/11/25 Vol. E82-A No. 11 pp. 2455-2464 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: formal verification, language containment, symbolic model checking, binary decision diagram (BDD), ω finite automaton,
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Algorithms for Generating Maximum Weight Independent Sets in Circle Graphs, Circular-Arc Overlap Graphs, and Spider Graphs Masakuni TAKI Hirotaka HATAKENAKA Toshinobu KASHIWABARA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/08/25 Vol. E82-A No. 8 pp. 1636-1640 Type of Manuscript: PAPER Category: Graphs and Networks Keyword: circle graph, independent set, generation algorithm, intersection graph, interval graph, overlap graph, spider graph, circular-arc overlap graph,
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An Exponential Lower Bound on the Size of a Binary Moment Diagram Representing Integer Division Masaki NAKANISHI Kiyoharu HAMAGUCHI Toshinobu KASHIWABARA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/05/25 Vol. E82-A No. 5 pp. 756-766 Type of Manuscript: Special Section PAPER (Special Section on Discrete Mathematics and Its Applications) Category: Keyword: binary moment diagram, division, lower bound,
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Convex Bipartite Graphs and Bipartite Circle Graphs Takashi KIZU Yasuchika HARUTA Toshiro ARAKI Toshinobu KASHIWABARA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1998/05/25 Vol. E81-A No. 5 pp. 789-795 Type of Manuscript: Special Section PAPER (Special Section on Discrete Mathematics and Its Applications) Category: Keyword: bipartite graph, convex bipartite graph, circle graph,
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A Representation Diagram for Maximal Independent Sets of a Graph Masakuni TAKI Sumio MASUDA Toshinobu KASHIWABARA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1998/05/25 Vol. E81-A No. 5 pp. 784-788 Type of Manuscript: Special Section PAPER (Special Section on Discrete Mathematics and Its Applications) Category: Keyword: maximal independent set, interval graph, cocomparability graph, generation problem,
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FOREWORD Toshinobu KASHIWABARA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1992/04/25 Vol. E75-A No. 4 pp. 467-467 Type of Manuscript: FOREWORD Category: Keyword:
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Testing the k-Layer Routability in a Circular Channel--Case in which No Nets Have Two Terminals on the Same Circle-- Noriya KOBAYASHI Toshinobu KASHIWABARA Sumio MASUDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1992/02/25 Vol. E75-A No. 2 pp. 233-239 Type of Manuscript: PAPER Category: Computer Aided Design (CAD) Keyword: algorithm, routing, via minimization, layer assignment,
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Testing the Two-Layer Routability in a Circular Channel Noriya KOBAYASHI Masahiro ABE Toshinobu KASHIWABARA Sumio MASUDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1992/01/25 Vol. E75-A No. 1 pp. 83-91 Type of Manuscript: PAPER Category: Computer Aided Design (CAD) Keyword: algorithm, routing problem, via minimization,
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Algorithms to Obtain a Maximal Planar Hamilton Subgraph Noriya KOBAYASHI Sumio MASUDA Toshinobu KASHIWABARA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1991/04/25 Vol. E74-A No. 4 pp. 657-664 Type of Manuscript: Special Section PAPER (Special Issue on Discrete Mathematics and Its Applications) Category: Keyword:
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Finding a Maximal Outerplanar Spanning Subgraph of a Graph Sumio MASUDA Toshinobu KASHIWABARA
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1990/04/25 Vol. E73-E No. 4 pp. 532-538 Type of Manuscript: PAPER Category: Algorithm, Data Structure and Computational Complexity Keyword:
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Permutation Layout with Limited Between-Pins Congestion Sang-hyun CHOE Toshinobu KASHIWABARA Toshio FUJISAWA
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1989/12/25 Vol. E72-E No. 12 pp. 1425-1431 Type of Manuscript: PAPER Category: Algorithm, Data Structure and Computational Complexity Keyword:
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Restricted Permutation Layout Sang-hyun CHOE Toshinobu KASHIWABARA Toshio FUJISAWA
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1985/05/25 Vol. E68-E No. 5 pp. 269-276 Type of Manuscript: PAPER Category: General Keyword:
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