Toshihiro MINAMI

Motion Estimation and Compensation Hardware Architecture for a Scene-Adaptive Algorithm on a Single-Chip MPEG-2 Video Encoder
Koyo NITTA Toshihiro MINAMI Toshio KONDO Takeshi OGURA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2001/03/01
Vol. E84-D  No. 3  pp. 317-325
Type of Manuscript:  PAPER
Category: VLSI Systems
motion estimation and compensationscene-adaptive algorithmMPEG-2 video encoderhardware architectureSIMD
 Summary | Full Text:PDF(4.3MB)

Three-Layer Cooperative Architecture for MPEG-2 Video Encoder LSI
Mitsuo IKEDA Toshio KONDO Koyo NITTA Kazuhito SUGURI Takeshi YOSHITOME Toshihiro MINAMI Jiro NAGANUMA Takeshi OGURA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/02/25
Vol. E83-C  No. 2  pp. 170-178
Type of Manuscript:  Special Section PAPER (Special Issue on Low-Power High-Speed CMOS LSI Technologies)
MPEG-2video signal processingembedded system LSIhardware/software co-designpicture coding
 Summary | Full Text:PDF(2.5MB)

An Overview of Video Coding VLSIs
Ryota KASAI Toshihiro MINAMI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/12/25
Vol. E77-C  No. 12  pp. 1920-1929
Type of Manuscript:  INVITED PAPER (Special Issue on Multimedia, Analog and Processing LSIs)
Category: Processors
video compression/decompressionVLSI architecturevideo signal processorbuilding block approachlow-power technology
 Summary | Full Text:PDF(890KB)