Fast Testable Design for SRAM-Based FPGAs
Abderrahim DOUMAR Toshiaki OHMAMEUDA Hideo ITO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2000/05/25
Vol. E83-D  No. 5  pp. 1116-1127
Type of Manuscript:  PAPER
Category: Fault Tolerance
field programmable gate array (FPGA)testingdesign for testingshifting configurations
 Summary | Full Text:PDF(1.3MB)

Dynamic Constructive Fault Tolerant Algorithm for Feedforward Neural Networks
Nait Charif HAMMADI Toshiaki OHMAMEUDA Keiichi KANEKO Hideo ITO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1998/01/25
Vol. E81-D  No. 1  pp. 115-123
Type of Manuscript:  PAPER
Category: Bio-Cybernetics and Neurocomputing
feedforward neural networkdynamic constructive algorithmfault toleranceDCFTA
 Summary | Full Text:PDF(776.6KB)

Capacitance and Resistance Measurement of Au/PrBa2Cu3Oy/YBa2Cu3Ox Structure at 4.2K
Toshiaki OHMAMEUDA Yoichi OKABE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/05/25
Vol. E78-C  No. 5  pp. 476-480
Type of Manuscript:  Special Section PAPER (Special Issue on Superconducting Electronics and Its Applications)
Category: Three terminal devices and Josephson Junctions
oxide superconductorYBa2Cu3OxPrBa2Cu3OyAu/PBCO/YBCO structure
 Summary | Full Text:PDF(378.2KB)