Toshiaki IWAMATSU


A CAD-Compatible SOI-CMOS Gate Array Using 0.35µm Partially-Depleted Transistors
Kimio UEDA Koji NII Yoshiki WADA Shigenobu MAEDA Toshiaki IWAMATSU Yasuo YAMAGUCHI Takashi IPPOSHI Shigeto MAEGAWA Koichiro MASHIKO Yasutaka HORIBA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/02/25
Vol. E83-C  No. 2  pp. 205-211
Type of Manuscript:  Special Section PAPER (Special Issue on Low-Power High-Speed CMOS LSI Technologies)
Category: 
Keyword: 
SOICMOSfield-shield isolationgate arraylow-powerhigh-speed
 Summary | Full Text:PDF

Analysis of the Delay Distributions of 0.5 µm SOI LSIs
Toshiaki IWAMATSU Takashi IPPOSHI Yasuo YAMAGUCHI Kimio UEDA Koichiro MASHIKO Shigeto MAEGAWA Yasuo INOUE Tadashi HIRAO Tdashi NISHIMURA Akihiko YASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/03/25
Vol. E80-C  No. 3  pp. 464-471
Type of Manuscript:  Special Section PAPER (Special Issue on SOI Devices and Their Process Technologies)
Category: 
Keyword: 
SOISIMOXdivideradderhigh-speedlow voltage
 Summary | Full Text:PDF

Features of SOI DRAM's and their Potential for Low-Voltage and/or Giga-Bit Scale DRAM's
Yasuo YAMAGUCHI Toshiyuki OASHI Takahisa EIMORI Toshiaki IWAMATSU Shouichi MITAMOTO Katsuhiro SUMA Takahiro TSURUDA Fukashi MORISHITA Masakazu HIROSE Hideto HIDAKA Kazutami ARIMOTO Kazuyasu FUJISHIMA Yasuo INOUE Tadashi NISHIMURA Hirokazu MIYOSHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/06/25
Vol. E79-C  No. 6  pp. 772-780
Type of Manuscript:  INVITED PAPER (Special Issue on ULSI Memory Technology)
Category: Dynamic RAMs
Keyword: 
SOLSIMOXDRAMlow-voltage operation
 Summary | Full Text:PDF

Low-Voltage Operation of a High-Resistivity Load SOI SRAM Cell by Reduced Back-Gate-Bias Effect
Yasuo YAMAGUCHI Jun TAKAHASHI Takehisa YAMAGUCHI Tomohisa WADA Toshiaki IWAMATSU Hans-Oliver JOACHIM Yasuo INOUE Tadashi NISHIMURA Natsuro TSUBOUCHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/07/25
Vol. E78-C  No. 7  pp. 812-817
Type of Manuscript:  Special Section PAPER (Special Issue on LSI Memory Device, Circuit, Architecture and Application Technologies for Multimedia Age)
Category: 
Keyword: 
SOISIMOXSRAMlow-voltage operationback-gate bias effect
 Summary | Full Text:PDF