IEICE Trans

Toru NAKURA

4-Cycle-Start-Up Reference-Clock-Less Digital CDR Utilizing TDC-Based Initial Frequency Error Detection with Frequency Tracking Loop Tetsuya IIZUKA Meikan CHIN Toru NAKURA Kunihiro ASADA
Publication: Publication Date: 2022/10/01 Vol. E105-C No. 10 pp. 544-551 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Their Application Technologies) Category: Keyword: clock-and-data recovery (CDR), time-to-digital converter (TDC), serial communication, quick start-up, internet-of-things,
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Triangular Active Charge Injection Method for Resonant Power Supply Noise Reduction Masahiro KANO Toru NAKURA Tetsuya IIZUKA Kunihiro ASADA
Publication: Publication Date: 2018/04/01 Vol. E101-C No. 4 pp. 292-298 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: signal integrity, resonant power supply noise, triangular active charge injection, DLL, vernier TDC,
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Quick-Start Pulse Width Controlled PLL with Frequency and Phase Presetting Toru NAKURA Tsukasa KAGAYA Tetsuya IIZUKA Kunihiro ASADA
Publication: Publication Date: 2018/04/01 Vol. E101-C No. 4 pp. 218-223 Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology) Category: Keyword: quick start PLL, phase and frequency presetting,
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Optimal Design Method of Sub-Ranging ADC Based on Stochastic Comparator Md. Maruf HOSSAIN Tetsuya IIZUKA Toru NAKURA Kunihiro ASADA
Publication: Publication Date: 2018/02/01 Vol. E101-A No. 2 pp. 410-424 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: sub-ranging ADC, stochastic comparator, yield, probability density function, optimization, calibration,
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A PLL Compiler from Specification to GDSII Toru NAKURA Tetsuya IIZUKA Kunihiro ASADA
Publication: Publication Date: 2017/12/01 Vol. E100-A No. 12 pp. 2741-2749 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: PLL compiler, PLL synthesis, PWPLL, specification to GDSII,
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A Gate Delay Mismatch Tolerant Time-Mode Analog Accumulator Using a Delay Line Ring Tomohiko YANO Toru NAKURA Tetsuya IIZUKA Kunihiro ASADA
Publication: Publication Date: 2017/09/01 Vol. E100-C No. 9 pp. 736-745 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: time-mode circuit, analog front end, integrator, accumulator, time domain, calibration free,
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Design, Analysis and Implementation of Pulse Generator by CMOS Flipped on Glass for Low Power UWB-IR Parit KANJANAVIROJKUL Nguyen NGOC MAI-KHANH Tetsuya IIZUKA Toru NAKURA Kunihiro ASADA
Publication: Publication Date: 2017/01/01 Vol. E100-A No. 1 pp. 200-209 Type of Manuscript: Special Section PAPER (Special Section on Wideband Systems) Category: Keyword: pulse generation, UWB-IR, CMOS, low duty cycle, energy efficiency, flip-chip devices,
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Power Supply Voltage Control for Eliminating Overkills and Underkills in Delay Fault Testing Masahiro ISHIDA Toru NAKURA Takashi KUSAKA Satoshi KOMATSU Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2016/10/01 Vol. E99-C No. 10 pp. 1219-1225 Type of Manuscript: PAPER Category: Semiconductor Materials and Devices Keyword: power integrity, power supply voltage control, overkills and underkills, delay fault testing, automatic test equipment,
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An On-Chip Measurement of PLL Transfer Function and Lock Range through Fully Digital Interface Toshiyuki KIKKAWA Toru NAKURA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2016/02/01 Vol. E99-C No. 2 pp. 275-284 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: PLL, transfer function, lock range, on-chip measurement,
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Resonant Power Supply Noise Reduction by STO Capacitors Fabricated on Interposer Toru NAKURA Masahiro KANO Masamitsu YOSHIZAWA Atsunori HATTORI Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2015/07/01 Vol. E98-C No. 7 pp. 734-740 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: resonant power supply noise, power integrity, embedded capacitor, STO capacitor,
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On-Chip Switched Decoupling Capacitor for Fast Voltage Hopping of DVS Systems Jinmyoung KIM Toru NAKURA Koichiro ISHIBASHI Makoto IKEDA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2013/04/01 Vol. E96-C No. 4 pp. 560-567 Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology) Category: Keyword: DVS, fast voltage hopping, resonant supply noise, decoupling capacitor, noise reduction, capacitance boosting,
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Frequency Resolution Enhancement for Digitally-Controlled Oscillator Based on a Single-Period Switching Scheme Kazutoshi KODAMA Tetsuya IIZUKA Toru NAKURA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2012/12/01 Vol. E95-C No. 12 pp. 1857-1863 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: DCO, ADPLL, high frequency resolution enhancement,
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On-Chip Switched Parasitic Capacitors of Sleep Blocks for Resonant Supply Noise Reduction Jinmyoung KIM Toru NAKURA Hidehiro TAKATA Koichiro ISHIBASHI Makoto IKEDA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2012/04/01 Vol. E95-C No. 4 pp. 643-650 Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology) Category: Keyword: resonant supply noise, switched parasitic capacitors, sleep block, power gating,
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Low Pass Filter-Less Pulse Width Controlled PLL Using Time to Soft Thermometer Code Converter Toru NAKURA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2012/02/01 Vol. E95-C No. 2 pp. 297-302 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: PLL, PWCO, pulse width control, soft thermometer code, LPF-less, quantization noise free,
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1.0 ps Resolution Time-to-Digital Converter Based-On Cascaded Time-Difference-Amplifier Utilizing Differential Logic Delay Cells Shingo MANDAI Tetsuya IIZUKA Toru NAKURA Makoto IKEDA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/06/01 Vol. E94-C No. 6 pp. 1098-1104 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: time-to-digital converter, TDC, time-difference-amplifier, TDA, time amp,
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All-Digital On-Chip Monitor for PMOS and NMOS Process Variability Utilizing Buffer Ring with Pulse Counter Tetsuya IIZUKA Jaehyun JEONG Toru NAKURA Makoto IKEDA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/04/01 Vol. E94-C No. 4 pp. 487-494 Type of Manuscript: Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration) Category: Keyword: process variability, all digital, on-chip monitor, buffer ring, NBTI, PBTI,
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On-Chip Resonant Supply Noise Canceller Utilizing Parasitic Capacitance of Sleep Blocks for Power Mode Switch Jinmyoung KIM Toru NAKURA Hidehiro TAKATA Koichiro ISHIBASHI Makoto IKEDA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/04/01 Vol. E94-C No. 4 pp. 511-519 Type of Manuscript: Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration) Category: Keyword: power supply noise, resonance, parasitic capacitance, sleep block, DVS, power gating,
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Cascaded Time Difference Amplifier with Differential Logic Delay Cell Shingo MANDAI Toru NAKURA Tetsuya IIZUKA Makoto IKEDA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/04/01 Vol. E94-C No. 4 pp. 654-662 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: time-difference-amplifier, TDA, time amp,
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A Low Power and High Throughput Self Synchronous FPGA Using 65 nm CMOS with Throughput Optimization by Pipeline Alignment Benjamin STEFAN DEVLIN Toru NAKURA Makoto IKEDA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/07/01 Vol. E93-A No. 7 pp. 1319-1328 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: self synchronous, fpga, pipeline alignment, low power, high throughput, dynamic logic, dual pipeline,
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Time Difference Amplifier with Robust Gain Using Closed-Loop Control Toru NAKURA Shingo MANDAI Makoto IKEDA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2010/03/01 Vol. E93-C No. 3 pp. 303-308 Type of Manuscript: Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration) Category: Keyword: time difference amplifier, TDA, time to digital converter, TDC, voltage controlled delay line,
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Dual Imager Core Chip with 24.8 Rangemaps/s 3-D and 58 fps 2-D Simultaneous Capture Capability Shingo MANDAI Toru NAKURA Makoto IKEDA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2009/06/01 Vol. E92-C No. 6 pp. 798-805 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: image sensor, light-section method, stereo-matching, dual imager core, multi functional range finder,
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Autonomous di/dt Control of Power Supply for Margin Aware Operation Toru NAKURA Makoto IKEDA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/11/01 Vol. E89-C No. 11 pp. 1689-1694 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: autonomous di/dt control, margin aware, di/dt detector, power supply current,
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Feedforward Active Substrate Noise Cancelling Based on di/dt of Power Supply Toru NAKURA Makoto IKEDA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/03/01 Vol. E89-C No. 3 pp. 364-369 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era) Category: Signal Integrity and Variability Keyword: substrate noise, di/dt, feedforward active cancelling, anti-phase, ground bounce, di/dt detector,
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Preliminary Experiments for Power Supply Noise Reduction Using On-Board Stubs Toru NAKURA Makoto IKEDA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/08/01 Vol. E88-C No. 8 pp. 1734-1739 Type of Manuscript: Special Section PAPER (Special Section on Papers Selected from AP-ASIC 2004) Category: Keyword: stub, on-board, power supply noise, di/dt noise, PRBS pattern,
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On-Chip di/dt Detector Circuit Toru NAKURA Makoto IKEDA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/05/01 Vol. E88-C No. 5 pp. 782-787 Type of Manuscript: Special Section PAPER (Special Section on Microelectronic Test Structures) Category: Keyword: di/dt detector, mutual inductor, spiral inductor, parasitic inductance, power supply noise,
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Stub vs. Capacitor for Power Supply Noise Reduction Toru NAKURA Makoto IKEDA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/01/01 Vol. E88-C No. 1 pp. 125-132 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: stub, decoupling capacitor, power supply noise, di/dt noise, IR drop,
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LAPAREX-An Automatic Parameter Extraction Program for Gain- and Index-Coupled Distributed Feedback Semiconductor Lasers, and Its Application to Observation of Changing Coupling Coefficients with Currents Toru NAKURA Yoshiaki NAKANO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2000/03/25 Vol. E83-C No. 3 pp. 488-495 Type of Manuscript: PAPER Category: Lasers, Quantum Electronics Keyword: distributed feedback semiconductor lasers, DFB lasers, parameter extraction, coupling coefficient, gain coupling,
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