Tetsuya YAMADA


Beacon Tracking System and Its Performance in Search Operation for Hayabusa Sample Return Capsule
Takahide MIZUNO Kousuke KAWAHARA Kazuhiko YAMADA Yukio KAMATA Tetsuya YAMADA Hitoshi KUNINAKA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2011/11/01
Vol. E94-B  No. 11  pp. 2961-2968
Type of Manuscript:  Special Section PAPER (Special Section on Space, Aeronautical and Navigational Technologies in Conjunction with Main Topics of WSANE and ICSANE)
Category: 
Keyword: 
Hayabusasample returnre-entry capsulerecoveryspace explorer
 Summary | Full Text:PDF(1.8MB)

A 45-nm 37.3 GOPS/W Heterogeneous Multi-Core SOC with 16/32 Bit Instruction-Set General-Purpose Core
Osamu NISHII Yoichi YUYAMA Masayuki ITO Yoshikazu KIYOSHIGE Yusuke NITTA Makoto ISHIKAWA Tetsuya YAMADA Junichi MIYAKOSHI Yasutaka WADA Keiji KIMURA Hironori KASAHARA Hideo MAEJIMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/04/01
Vol. E94-C  No. 4  pp. 663-669
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
heterogeneousinstruction setMMU
 Summary | Full Text:PDF(2.7MB)

A Hardware Accelerator for JavaTM Platforms on a 130-nm Embedded Processor Core
Tetsuya YAMADA Naohiko IRIE Takanobu TSUNODA Takahiro IRITA Kenji KITAGAWA Ryohei YOSHIDA Keisuke TOYAMA Motoaki SATOYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/02/01
Vol. E90-C  No. 2  pp. 523-530
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
embedded processorJavaacceleratorbytecode
 Summary | Full Text:PDF(1.8MB)

Reducing Consuming Clock Power Optimization of a 90 nm Embedded Processor Core
Tetsuya YAMADA Masahide ABE Yusuke NITTA Kenji OGURA Manabu KUSAOKE Makoto ISHIKAWA Motokazu OZAWA Kiwamu TAKADA Fumio ARAKAWA Osamu NISHII Toshihiro HATTORI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/03/01
Vol. E89-C  No. 3  pp. 287-294
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era)
Category: Low Power Techniques
Keyword: 
embedded processorclockgated clockflip-flop
 Summary | Full Text:PDF(1.4MB)

A Low-Power Embedded RISC Microprocessor with an Integrated DSP for Mobile Applications
Tetsuya YAMADA Makoto ISHIKAWA Yuji OGATA Takanobu TSUNODA Takahiro IRITA Saneaki TAMAKI Kunihiko NISHIYAMA Tatsuya KAMEI Ken TATEZAWA Fumio ARAKAWA Takuichiro NAKAZAWA Toshihiro HATTORI Kunio UCHIYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/02/01
Vol. E85-C  No. 2  pp. 253-262
Type of Manuscript:  INVITED PAPER (Special Issue on High-Performance and Low-Power Microprocessors)
Category: 
Keyword: 
embedded processorlow powerRISCDSPMAC
 Summary | Full Text:PDF(1.8MB)