IEICE SEARCH SYSTEM

Tetsuya HIROSE

A Sub-1-µs Start-Up Time, Fully-Integrated 32-MHz Relaxation Oscillator for Low-Power Intermittent Systems Hiroki ASANO Tetsuya HIROSE Taro MIYOSHI Keishi TSUBAKI Toshihiro OZAKI Nobutaka KUROKI Masahiro NUMA
Publication: Publication Date: 2018/03/01 Vol. E101-C No. 3 pp. 161-169 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: relaxation oscillator, fast start-up, digital signal processing, high accuracy, intermittent operation, PVT variations,
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Multi-Channel Convolutional Neural Networks for Image Super-Resolution Shinya OHTANI Yu KATO Nobutaka KUROKI Tetsuya HIROSE Masahiro NUMA
Publication: Publication Date: 2017/02/01 Vol. E100-A No. 2 pp. 572-580 Type of Manuscript: Special Section PAPER (Special Section on Image Media Quality) Category: IMAGE PROCESSING Keyword: super-resolution, resolution enhancement, convolutional neural networks, CNN, deep learning,
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A Highly Efficient Switched-Capacitor Voltage Boost Converter with Nano-Watt MPPT Controller for Low-Voltage Energy Harvesting Toshihiro OZAKI Tetsuya HIROSE Takahiro NAGAI Keishi TSUBAKI Nobutaka KUROKI Masahiro NUMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2016/12/01 Vol. E99-A No. 12 pp. 2491-2499 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: energy harvesting, DC-DC converter, charge pump, MPPT, low-power,
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An Energy-Efficient 24T Flip-Flop Consisting of Standard CMOS Gates for Ultra-Low Power Digital VLSIs Yuzuru SHIZUKU Tetsuya HIROSE Nobutaka KUROKI Masahiro NUMA Mitsuji OKADA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2015/12/01 Vol. E98-A No. 12 pp. 2600-2606 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Circuit Design Keyword: D flip-flop, low-power, low-voltage, energy-efficient, compact,
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A 32-kHz Real-Time Clock Oscillator with On-Chip PVT Variation Compensation Circuit for Ultra-Low Power MCUs Keishi TSUBAKI Tetsuya HIROSE Nobutaka KUROKI Masahiro NUMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2015/05/01 Vol. E98-C No. 5 pp. 446-453 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: ROSC, RTC, oscillator, comparator, PVT variation, low-power,
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A Fully On-Chip, 6.66-kHz, 320-nA, 56ppm/°C, CMOS Relaxation Oscillator with PVT Variation Compensation Circuit Keishi TSUBAKI Tetsuya HIROSE Yuji OSAKI Seiichiro SHIGA Nobutaka KUROKI Masahiro NUMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2014/06/01 Vol. E97-C No. 6 pp. 512-518 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: ROSC, RTC, oscillator, comparator, PVT variation, low-power,
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Signal-Dependent Analog-to-Digital Conversion Based on MINIMAX Sampling Igors HOMJAKOVS Masanori HASHIMOTO Tetsuya HIROSE Takao ONOYE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2013/02/01 Vol. E96-A No. 2 pp. 459-468 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: signal-dependent sampling, MINIMAX, peak-detection,
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Subthreshold SRAM with Write Assist Technique Using On-Chip Threshold Voltage Monitoring Circuit Kei MATSUMOTO Tetsuya HIROSE Yuji OSAKI Nobutaka KUROKI Masahiro NUMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/06/01 Vol. E94-C No. 6 pp. 1042-1048 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: SRAM, threshold voltage variation, compensation circuit, process variation, temperature variation, PVT variation,
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Robust Subthreshold CMOS Digital Circuit Design with On-Chip Adaptive Supply Voltage Scaling Technique Yuji OSAKI Tetsuya HIROSE Kei MATSUMOTO Nobutaka KUROKI Masahiro NUMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/01/01 Vol. E94-C No. 1 pp. 80-88 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: subthreshold operation, digital circuits, PVT variation, delay compensation,
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An Error Diagnosis Technique Based on Clustering of Elements Kosuke SHIOKI Narumi OKADA Kosuke WATANABE Tetsuya HIROSE Nobutaka KUROKI Masahiro NUMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/12/01 Vol. E93-A No. 12 pp. 2490-2496 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Logic Synthesis, Test and Verification Keyword: ECO, error diagnosis, incremental synthesis, LUT,
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An On-Chip PVT Compensation Technique with Current Monitoring Circuit for Low-Voltage CMOS Digital LSIs Yusuke TSUGITA Ken UENO Tetsuya HIROSE Tetsuya ASAI Yoshihito AMEMIYA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2010/06/01 Vol. E93-C No. 6 pp. 835-841 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: digital circuits, threshold voltage variation, compensation circuit, PVT variation,
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Low-Voltage Process-Compensated VCO with On-Chip Process Monitoring and Body-Biasing Circuit Techniques Ken UENO Tetsuya HIROSE Tetsuya ASAI Yoshihito AMEMIYA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/12/01 Vol. E92-A No. 12 pp. 3079-3081 Type of Manuscript: Special Section LETTER (Special Section on VLSI Design and CAD Algorithms) Category: Device and Circuit Modeling and Analysis Keyword: voltage-controlled oscillator, process variation, process compensation, body bias, current reference,
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An Error Diagnosis Technique Based on Location Sets to Rectify Subcircuits Kosuke SHIOKI Narumi OKADA Toshiro ISHIHARA Tetsuya HIROSE Nobutaka KUROKI Masahiro NUMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/12/01 Vol. E92-A No. 12 pp. 3136-3142 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Logic Synthesis, Test and Verfication Keyword: ECO, error diagnosis, incremental synthesis, LUT,
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Threshold-Logic Devices Consisting of Subthreshold CMOS Circuits Taichi OGAWA Tetsuya HIROSE Tetsuya ASAI Yoshihito AMEMIYA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/02/01 Vol. E92-A No. 2 pp. 436-442 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: subthreshold, MOS, circuit, threshold logic, majority logic, gate, current mode,
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Noise-Induced Synchronization among Sub-RF CMOS Analog Oscillators for Skew-Free Clock Distribution Akira UTAGAWA Tetsuya ASAI Tetsuya HIROSE Yoshihito AMEMIYA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/09/01 Vol. E91-A No. 9 pp. 2475-2481 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications) Category: Electronic Circuits and Systems Keyword: clock distribution, synchronization, nonlinear oscillators, clock skew,
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An Inhibitory Neural-Network Circuit Exhibiting Noise Shaping with Subthreshold MOS Neuron Circuits Akira UTAGAWA Tetsuya ASAI Tetsuya HIROSE Yoshihito AMEMIYA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/10/01 Vol. E90-A No. 10 pp. 2108-2115 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications) Category: Neuron and Neural Networks Keyword: neuromorphic analog integrated circuits, pulse density modulation, noise shaping, subthreshold CMOS circuits,
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A CMOS Watchdog Sensor for Certifying the Quality of Various Perishables with a Wider Activation Energy Ken UENO Tetsuya HIROSE Tetsuya ASAI Yoshihito AMEMIYA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/04/01 Vol. E89-A No. 4 pp. 902-907 Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: CMOS, sensor, subthreshold, translinear, low power, quality guarantee,
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Ultralow-Power Current Reference Circuit with Low Temperature Dependence Tetsuya HIROSE Toshimasa MATSUOKA Kenji TANIGUCHI Tetsuya ASAI Yoshihito AMEMIYA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/06/01 Vol. E88-C No. 6 pp. 1142-1147 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit and Device Technologies) Category: Building Block Keyword: CMOS, reference, subthreshold, weak inversion, low power, temperature dependence,
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A CMOS IF Variable Gain Amplifier with Exponential Gain Control Sungwoo CHA Tetsuya HIROSE Masaki HARUOKA Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/02/01 Vol. E88-A No. 2 pp. 410-415 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: variable gain amplifier, VGA, linearized transconductance, linear-in-dB characteristics, exponential gain control, CMOS,
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Watch-Dog Circuit for Quality Guarantee with Subthreshold MOSFET Current Tetsuya HIROSE Ryuji YOSHIMURA Toru IDO Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2004/11/01 Vol. E87-C No. 11 pp. 1910-1914 Type of Manuscript: Special Section PAPER (Special Section on New System Paradigms for Integrated Electronics) Category: Keyword: CMOS, subthreshold current, ultra-low-power, temperature dependence,
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