Tetsu FUKANO


Fabrication and Delay Time Analysis of Deep Submicron CMOS Devices
Yasuo NARA Manabu DEURA Ken-ichi GOTO Tatsuya YAMAZAKI Tetsu FUKANO Toshihiro SUGII 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/03/25
Vol. E78-C  No. 3  pp. 293-298
Type of Manuscript:  Special Section PAPER (Special Issue on Sub-1/4 Micron Device and Process Technologies)
Category: 
Keyword: 
deep submicronCMOSgate resistancesalicidepropagation delay timeSPICE
 Summary | Full Text:PDF

Ti Salicide Process for Subquarter-Micron CMOS Devices
Ken-ichi GOTO Tatsuya YAMAZAKI Yasuo NARA Tetsu FUKANO Toshihiro SUGII Yoshihiro ARIMOTO Takashi ITO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/03/25
Vol. E77-C  No. 3  pp. 480-485
Type of Manuscript:  Special Section PAPER (Special Issue on Quarter Micron Si Device and Process Technologies)
Category: Process Technology
Keyword: 
TiTiSi2salicidesubquarter-micron CMOSgate resistance
 Summary | Full Text:PDF

High-Speed SOI Bipolar Transistors Using Bonding and Thinning Techniques
Manabu KOJIMA Atsushi FUKURODA Tetsu FUKANO Naoshi HIGAKI Tatsuya YAMAZAKI Toshihiro SUGII Yoshihiro ARIMOTO Takashi ITO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/04/25
Vol. E76-C  No. 4  pp. 572-576
Type of Manuscript:  Special Section PAPER (Special Issue on Sub-Half Micron Si Device and Process Technologies)
Category: Device Technology
Keyword: 
SOI bipolar transistorsthin buried layerwafer bondingselective polishing
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A 4 GHz Thin-Base Lateral Bipolar Transistor Fabricated on Bonded SOI
Naoshi HIGAKI Tetsu FUKANO Atsushi FUKURODA Toshihiro SUGII Yoshihiro ARIMOTO Takashi ITO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/12/25
Vol. E75-C  No. 12  pp. 1453-1458
Type of Manuscript:  Special Section PAPER (Special Issue on SOI (Si on Insulator) Devices)
Category: SOI Devices
Keyword: 
bonded SOIlateral bipolarsidewall self-aligning baseBiCMOSrecrystallization
 Summary | Full Text:PDF