Teru YONEYAMA


A Low Voltage Floating Resistor Circuit Having Both Positive and Negative Resistance Values
Shashidhar TANTRY Yasuyuki HIRAKU Takao OURA Teru YONEYAMA Hideki ASAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/02/01
Vol. E86-A  No. 2  pp. 335-341
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
floating resistorpositive-negative resistorlow voltage circuits
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Design and Simulation of 4Q-Multiplier Using Linear and Saturation Regions of MOSFET Complementally
Tsutomu SUZUKI Takao OURA Teru YONEYAMA Hideki ASAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/06/01
Vol. E85-A  No. 6  pp. 1242-1248
Type of Manuscript:  Special Section PAPER (Special Section on Papers Selected from 2001 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2001))
Category: 
Keyword: 
4Q-MultiplierMOSFETlinear regionsaturation regionanalog circuit
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A CMOS Floating Resistor Circuit Having Both Positive and Negative Resistance Values
Takao OURA Teru YONEYAMA Shashidhar TANTRY Hideki ASAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/02/01
Vol. E85-A  No. 2  pp. 399-402
Type of Manuscript:  Special Section LETTER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
floating resistorMOS resistoranalog electronic circuits
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Design Method of Neural Networks for Limit Cycle Generator by Linear Programming
Teru YONEYAMA Hiroshi NINOMIYA Hideki ASAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/02/01
Vol. E84-A  No. 2  pp. 688-692
Type of Manuscript:  LETTER
Category: Neural Networks and Bioengineering
Keyword: 
neural networklimit cycle generatorlinear programmingsynaptic weightsanalog electronic circuits
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A Fast Neural Network Simulator for State Transition Analysis
Atsushi KAMO Hiroshi NINOMIYA Teru YONEYAMA Hideki ASAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/09/25
Vol. E82-A  No. 9  pp. 1796-1801
Type of Manuscript:  Special Section PAPER (Special Section on Nonlinear Theory and Its Applications)
Category: 
Keyword: 
stepwise constant methodmultivalued neural networkASSISTstate transition analysis
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A Fast Algorithm for Spatiotemporal Pattern Analysis of Neural Networks with Multivalued Logic
Hiroshi NINOMIYA Atsushi KAMO Teru YONEYAMA Hideki ASAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/09/25
Vol. E81-A  No. 9  pp. 1847-1852
Type of Manuscript:  Special Section PAPER (Special Section on Nonlinear Theory and Its Applications)
Category: Neural Networks
Keyword: 
continuous-time neural networksmultivalued logicstepwise constant functionspatiotemporal pattern analysis
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