Takuji HIEDA

Static Mapping with Dynamic Switching of Multiple Data-Parallel Applications on Embedded Many-Core SoCs
Ittetsu TANIGUCHI Junya KAIDA Takuji HIEDA Yuko HARA-AZUMI Hiroyuki TOMIYAMA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2014/11/01
Vol. E97-D  No. 11  pp. 2827-2834
Type of Manuscript:  PAPER
Category: Fundamentals of Information Systems
Keyword: 
many-core SoCs, application mapping, system-level design, embedded systems, 
 Summary | Full Text:PDF
Static Mapping of Multiple Data-Parallel Applications on Embedded Many-Core SoCs
Junya KAIDA Yuko HARA-AZUMI Takuji HIEDA Ittetsu TANIGUCHI Hiroyuki TOMIYAMA Koji INOUE 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/10/01
Vol. E96-D  No. 10  pp. 2268-2271
Type of Manuscript:  LETTER
Category: Computer System
Keyword: 
many-core SoCs, application mapping, system-level design, embedded systems, 
 Summary | Full Text:PDF
Heuristic Instruction Scheduling Algorithm Using Available Distance for Partial Forwarding Processor
Takuji HIEDA Hiroaki TANAKA Keishi SAKANUSHI Yoshinori TAKEUCHI Masaharu IMAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/12/01
Vol. E92-A  No. 12  pp. 3258-3267
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Embedded, Real-Time and Reconfigurable Systems
Keyword: 
partial forwarding, instruction scheduling, compiler, design space exploration, 
 Summary | Full Text:PDF