IEICE Trans

Takeshi TOKUDA

A 300 MHz Dual Port Palette RAM Using Port Swap Architecture Yasunobu NAKASE Koichiro MASHIKO Yoshio MATSUDA Takeshi TOKUDA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/09/25 Vol. E81-C No. 9 pp. 1484-1490 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: dual port SRAM, graphics, color palette, small cell size,
	Summary \| Full Text:PDF(729.6KB)

A 10-bit 50 MS/s 300 mW A/D Converter Using Reference Feed-Forward Architecture Takashi OKUDA Osamu MATSUMOTO Toshio KUMAMOTO Masao ITO Hiroyuki MOMONO Takahiro MIKI Takeshi TOKUDA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1997/12/25 Vol. E80-C No. 12 pp. 1553-1559 Type of Manuscript: Special Section PAPER (Special Issue on Low-Power and High-Speed LSI Technologies) Category: Keyword: pipelined A/D converter, reference feed-forward architecture, offset cancellation technique, gain matching,
	Summary \| Full Text:PDF(650.3KB)

A Built-In Self-Test for ADC and DAC in a Single-Chip Speech CODEC Eiichi TERAOKA Toru KENGAKU Ikuo YASUI Kazuyuki ISHIKAWA Takahiro MATSUO Hideyuki WAKADA Narumi SAKASHITA Yukihiko SHIMAZU Takeshi TOKUDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1997/02/25 Vol. E80-A No. 2 pp. 339-345 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques for System-on-Chip Integration) Category: Keyword: built-in self-test, CODEC, digital signal processor,
	Summary \| Full Text:PDF(563.9KB)

A 28 mW 16-bit Digital Signal Processor for the PDC Half-Rate CODEC Taketora SHIRAISI Koji KAWAMOTO Kazuyuki ISHIKAWA Eiichi TERAOKA Hidehiro TAKATA Takeshi TOKUDA Kouichi NISHIDA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1996/12/25 Vol. E79-C No. 12 pp. 1679-1685 Type of Manuscript: Special Section PAPER (Special Issue on Low-Power LSI Technologies) Category: Keyword: digital signal processor, CODEC, low power consumption,
	Summary \| Full Text:PDF(764.5KB)

A 12-bit Resolution 200 kFLIPS Fuzzy Inference Processor Kazuo NAKAMURA Narumi SAKASHITA Yasuhiko NITTA Kenichi SHIMOMURA Takeshi TOKUDA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1993/07/25 Vol. E76-C No. 7 pp. 1102-1111 Type of Manuscript: Special Section PAPER (Special Issue on New Architecture LSIs) Category: Fuzzy Logic System Keyword: fuzzy inference, rule, membership function, microprocessor,
	Summary \| Full Text:PDF(835.7KB)

A Mixed-Signal Digital Signal Processor for Single-Chip Speech Codec Takeshi TOKUDA Tohru KENGAKU Eiichi TERAOKA Ikuo YASUI Taketora SHIRAISHI Hisako SAWAI Koji KAWAMOTO Kazuyuki ISHIKAWA Toshiki FUZIYAMA Narumi SAKASHITA Hiroichi ISHIDA Shinya TAKAHASHI Takahiko IIDA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1992/10/25 Vol. E75-C No. 10 pp. 1241-1249 Type of Manuscript: Special Section PAPER (Special Issue on Microprocessors) Category: Application Specific Processors Keyword: DSP, speech codic,
	Summary \| Full Text:PDF(909.1KB)

Built-In Self-Test in a 24 Bit Floating Point Digital Signal Processor Narumi SAKASHITA Hisako SAWAI Eiichi TERAOKA Toshiki FUJIYAMA Tohru KENGAKU Yukihiko SHIMAZU Akiharu TADA Takeshi TOKUDA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1991/11/25 Vol. E74-C No. 11 pp. 3838-3844 Type of Manuscript: Special Section PAPER (Special Issue on the High Performance ASIC and Microprocessor) Category: Dedicated Processors Keyword:
	Summary \| Full Text:PDF(661KB)

Self-Timed Clocking Design for a Data-Driven Microprocessor Fumiyasu ASAI Shinji KOMORI Toshiyuki TAMURA Hisakazu SATO Hidehiro TAKATA Yoshihiro SEGUCHI Takeshi TOKUDA Hiroaki TERADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1991/11/25 Vol. E74-C No. 11 pp. 3757-3765 Type of Manuscript: Special Section PAPER (Special Issue on the High Performance ASIC and Microprocessor) Category: Circuit Design Keyword:
	Summary \| Full Text:PDF(904.5KB)