Takeshi MIZUSAWA


A Fully Depleted CMOS/SIMOX LSI Scheme Using a LVTTL-Compatible and Over-2, 000-V ESD-Hardness I/O Circuit for Reduction in Active and Static Power Consumption
Yusuke OHTOMO Takeshi MIZUSAWA Kazuyoshi NISHIMURA Hirotoshi SAWADA Masayuki INO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/03/25
Vol. E80-C  No. 3  pp. 455-463
Type of Manuscript:  Special Section PAPER (Special Issue on SOI Devices and Their Process Technologies)
Category: 
Keyword: 
CMOSSOIlow voltageLVTTL-compatibleESD
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