Takefumi MIYOSHI

Design and Evaluation of a Configurable Query Processing Hardware for Data Streams
Yasin OGE Masato YOSHIMI Takefumi MIYOSHI Hideyuki KAWASHIMA Hidetsugu IRIE Tsutomu YOSHINAGA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2015/12/01
Vol. E98-D  No. 12  pp. 2207-2217
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
FPGA, query processing, data stream, sliding-window aggregation, configurable hardware architecture, 
 Summary | Full Text:PDF
Design and Implementation of a Handshake Join Architecture on FPGA
Yasin OGE Takefumi MIYOSHI Hideyuki KAWASHIMA Tsutomu YOSHINAGA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/12/01
Vol. E95-D  No. 12  pp. 2919-2927
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: Computer Architecture
Keyword: 
FPGA, data stream processing, window join operator, accelerator, handshake join, 
 Summary | Full Text:PDF
Using Cacheline Reuse Characteristics for Prefetcher Throttling
Hidetsugu IRIE Takefumi MIYOSHI Goki HONJO Kei HIRAKI Tsutomu YOSHINAGA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/12/01
Vol. E95-D  No. 12  pp. 2928-2938
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: Computer Architecture
Keyword: 
microarchitecture, cache, prefetch, 
 Summary | Full Text:PDF
Computation-Communication Overlap of Linpack on a GPU-Accelerated PC Cluster
Junichi OHMURA Takefumi MIYOSHI Hidetsugu IRIE Tsutomu YOSHINAGA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2011/12/01
Vol. E94-D  No. 12  pp. 2319-2327
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: 
Keyword: 
parallel processing, multi-core processor, GPU, computation-communication overlap, 
 Summary | Full Text:PDF
Compiler for Architecture with Dynamic Reconfigurable Processing Unit by Use of Automatic Assignment Method of Sub-Programs Based on Their Quantitative Evaluation
Takefumi MIYOSHI Nobuhiko SUGINO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2007/12/01
Vol. E90-D  No. 12  pp. 1967-1976
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Reconfigurable Device and Design Tools
Keyword: 
dynamic reconfigurable processor, compiler, automatic context generation, 
 Summary | Full Text:PDF
Unified Phase Compiler by Use of 3-D Representation Space
Takefumi MIYOSHI Nobuhiko SUGINO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/04/01
Vol. E88-A  No. 4  pp. 838-845
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 17th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
optimized compiler, VLIW, DSP, algorithm, 
 Summary | Full Text:PDF