IEICE Trans

Takayuki WATANABE

Generating Stable and Sparse Reluctance/Inductance Matrix under Insufficient Discretization Yuichi TANJI Takayuki WATANABE
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2010/03/01 Vol. E93-C No. 3 pp. 379-387 Type of Manuscript: Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration) Category: Keyword: inductance, reluctance, sparse, signal/power integrity,
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Fast Transient Simulation of Power Distribution Networks Containing Dispersion Based on Parallel-Distributed Leapfrog Algorithm Takayuki WATANABE Yuichi TANJI Hidemasa KUBOTA Hideki ASAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/02/01 Vol. E90-A No. 2 pp. 388-397 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: circuit simulation, power integrity, leapfrog algorithm, frequency-dependent dispersion, parallel computation,
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An Enhanced Time-Domain Circuit Simulation Technique Based on LIM Hidemasa KUBOTA Yuichi TANJI Takayuki WATANABE Hideki ASAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/05/01 Vol. E89-A No. 5 pp. 1505-1506 Type of Manuscript: LETTER Category: Numerical Analysis and Optimization Keyword: circuit simulation, LIM, numerical integration, power integrity, signal integrity,
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New Criteria of Selective Orthogonal Matrix Least-Squares Method for Macromodeling Multiport Networks Characterized by Sampled Data Yuichi TANJI Masaya SUZUKI Takayuki WATANABE Hideki ASAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/02/01 Vol. E88-A No. 2 pp. 524-532 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: top-down design and bottom-up verification methodology, orthogonal least-squares method, Verilog-AMS, Verilog-A, sampled data, matrix rational approximation,
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An Efficient Simulation Method of Linear/Nonlinear Mixed Circuits Based on Hybrid Model Order Reduction Technique Takashi MINE Hidemasa KUBOTA Atsushi KAMO Takayuki WATANABE Hideki ASAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/09/01 Vol. E87-A No. 9 pp. 2274-2279 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications) Category: Keyword: circuit simulation, congruence transformation, nonlinear circuit reduction technique,
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Macromodel Generation for Hybrid Systems Consisting of Electromagnetic Systems and Lumped RLC Circuits Based on Model Order Reduction Takayuki WATANABE Hideki ASAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/02/01 Vol. E87-A No. 2 pp. 398-405 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: circuit simulation, model order reduction, finite-difference frequency domain method, efficient nodal order reduction,
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A Framework for Macromodeling and Mixed-Mode Simulation of Circuits/Interconnects and Electromagnetic Radiations Takayuki WATANABE Hideki ASAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/02/01 Vol. E86-A No. 2 pp. 252-261 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: analog circuit simulation, SPICE macromodel, electromagnetic radiations, finite-difference time-domain method,
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An Efficient Simulator for Multiport Interconnects with Model Order Reduction Technique Hidemasa KUBOTA Atsushi KAMO Takayuki WATANABE Hideki ASAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/06/01 Vol. E85-A No. 6 pp. 1214-1219 Type of Manuscript: Special Section PAPER (Special Section on Papers Selected from 2001 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2001)) Category: Keyword: reduced-order model, PRIMA, PCB simulation, ASSIST, voltage controlled current source model,
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Low Noise Figure (6.3 dB) Polarization Insensitive Spot-Size Converter Integrated Semiconductor Optical Amplifier Ken MORITO Mitsuru EKAWA Takayuki WATANABE Yuji KOTAKI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2002/04/01 Vol. E85-C No. 4 pp. 990-994 Type of Manuscript: Special Section PAPER (Special Issue on Recent Progress of Integrated Photonic Devices) Category: Active Devices Keyword: semiconductor optical amplifier (SOA), spot-size converters, polarization insensitive, noise figure,
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A New Methodology for Optimal Placement of Decoupling Capacitors on Printed Circuit Board Atsushi KAMO Takayuki WATANABE Hideki ASAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/12/01 Vol. E84-A No. 12 pp. 3177-3181 Type of Manuscript: LETTER Category: Circuit Theory Keyword: Krylov-subspace technique, partial element equivalent circuit (PEEC), network reduction, decoupling capacitor,
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Acceleration Techniques for Synthesis and Analysis of Time-Domain Models of Interconnects Using FDTD Method Takayuki WATANABE Hideki ASAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/01/01 Vol. E84-A No. 1 pp. 367-371 Type of Manuscript: LETTER Category: Circuit Theory Keyword: circuit simulation, FDTD method, time-domain macromodel, characteristic impedance,
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Transient Analysis for Transmission Line Networks Using Expanded GMC Atsushi KAMO Takayuki WATANABE Hideki ASAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/09/25 Vol. E82-A No. 9 pp. 1789-1795 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and Its Applications) Category: Keyword: expanded generalized method of characteristic, linear subcircuit, characteristic impedance, wave propagation function,
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Relaxation-Based Transient Analysis of Lossy Coupled Transmission Lines Circuits Using Delay Evaluation Technique Takayuki WATANABE Atsushi KAMO Hideki ASAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1998/06/25 Vol. E81-A No. 6 pp. 1055-1062 Type of Manuscript: Special Section PAPER (Special Section of Papers Selected from ITC-CSCC'97) Category: Modeling and Simulation Keyword: circuit simulation, lossy transmission lines, waveform relaxation, delay evaluation technique,
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Acceleration Techniques for Waveform Relaxation Approaches to Coupled Lossy Transmission Lines Circuit Analysis Using GMC and GLDW Techniques Takayuki WATANABE Hideki ASAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1996/10/25 Vol. E79-A No. 10 pp. 1538-1545 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications (NOLTA)) Category: Nonlinear Circuits and Bifurcation Keyword: lossy transmission line, generalized method of characteristics, waveform relaxation method, line delay partitioning technique, circuit simulator,
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