Takayasu SAKURAI


Design and Analysis of Ultra-Low Power Glitch-Free Programmable Voltage Detector Based on Multiple Voltage Copier
Teruki SOMEYA Hiroshi FUKETA Kenichi MATSUNAGA Hiroki MORIMURA Takayasu SAKURAI Makoto TAKAMIYA 
Publication:   
Publication Date: 2017/04/01
Vol. E100-C  No. 4  pp. 349-358
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
voltage detectorvoltage referencelow powerlow voltagemultiple voltage copier
 Summary | Full Text:PDF(1.6MB)

EMI Camera LSI (EMcam) with On-Chip Loop Antenna Matrix to Measure EMI Noise Spectrum and Distribution
Naoki MASUNAGA Koichi ISHIDA Takayasu SAKURAI Makoto TAKAMIYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/06/01
Vol. E95-C  No. 6  pp. 1059-1066
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
electromagnetic interferenceon-chip loop antennadown-conversionnoise distribution
 Summary | Full Text:PDF(5.2MB)

A 315 MHz Power-Gated Ultra Low Power Transceiver in 40 nm CMOS for Wireless Sensor Network
Lechang LIU Takayasu SAKURAI Makoto TAKAMIYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/06/01
Vol. E95-C  No. 6  pp. 1035-1041
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
injection lockpower gatinglow noise amplifierultra low power
 Summary | Full Text:PDF(2.4MB)

A Variable Output Voltage Switched-Capacitor DC-DC Converter with Pulse Density and Width Modulation (PDWM) for 57% Ripple Reduction at Low Output Voltage
Xin ZHANG Yu PU Koichi ISHIDA Yoshikatsu RYU Yasuyuki OKUMA Po-Hung CHEN Takayasu SAKURAI Makoto TAKAMIYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/06/01
Vol. E94-C  No. 6  pp. 953-959
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
DC-DC converterlow ripplelow voltagepulse density modulationpulse width modulationswitched-capacitor
 Summary | Full Text:PDF(2MB)

0.5-V Input Digital Low-Dropout Regulator (LDO) with 98.7% Current Efficiency in 65 nm CMOS
Yasuyuki OKUMA Koichi ISHIDA Yoshikatsu RYU Xin ZHANG Po-Hung CHEN Kazunori WATANABE Makoto TAKAMIYA Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/06/01
Vol. E94-C  No. 6  pp. 938-944
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
low dropout regulatordigital controllow voltage
 Summary | Full Text:PDF(1.3MB)

1 Gb/s, 50 µm 50 µm Pads on Board Wireless Connector Based on Track-and-Charge Scheme Allowing Contacted Signaling
Katsuyuki IKEUCHI Hideki KUSAMITSU Mutsuo DAITO Gil-Su KIM Makoto TAKAMIYA Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/06/01
Vol. E94-C  No. 6  pp. 992-998
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
capacitive couplingproximity communicationwireless connectors
 Summary | Full Text:PDF(1.2MB)

Power Supply Voltage Dependence of Within-Die Delay Variation of Regular Manual Layout and Irregular Place-and-Route Layout
Tadashi YASUFUKU Yasumi NAKAMURA Zhe PIAO Makoto TAKAMIYA Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/06/01
Vol. E94-C  No. 6  pp. 1072-1075
Type of Manuscript:  BRIEF PAPER
Category: 
Keyword: 
within-die delay variationdesign methodologylow voltage
 Summary | Full Text:PDF(919KB)

0.6 V Voltage Shifter and Clocked Comparator for Sampling Correlation-Based Impulse Radio UWB Receiver
Lechang LIU Takayasu SAKURAI Makoto TAKAMIYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/06/01
Vol. E94-C  No. 6  pp. 985-991
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
impulse radio ultra-wideband (IR-UWB)voltage shifterclocked comparatorlow voltage
 Summary | Full Text:PDF(2.1MB)

0.18-V Input Charge Pump with Forward Body Bias to Startup Boost Converter for Energy Harvesting Applications
Po-Hung CHEN Koichi ISHIDA Xin ZHANG Yasuyuki OKUMA Yoshikatsu RYU Makoto TAKAMIYA Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/04/01
Vol. E94-C  No. 4  pp. 598-604
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
charge pumpsswitched capacitorstartupboost converterlow voltage
 Summary | Full Text:PDF(2MB)

A 1.76 mW, 100 Mbps Impulse Radio UWB Receiver with Multiple Sampling Correlators Eliminating Need for Phase Synchronization in 65-nm CMOS
Lechang LIU Zhiwei ZHOU Takayasu SAKURAI Makoto TAKAMIYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/06/01
Vol. E93-C  No. 6  pp. 796-802
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
impulse radio ultra-wideband (IR-UWB)charge-domain sampling correlatorscharge injectionvariable threshold comparatorlow power
 Summary | Full Text:PDF(1.4MB)

Inductor and TSV Design of 20-V Boost Converter for Low Power 3D Solid State Drive with NAND Flash Memories
Tadashi YASUFUKU Koichi ISHIDA Shinji MIYAMOTO Hiroto NAKAI Makoto TAKAMIYA Takayasu SAKURAI Ken TAKEUCHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/03/01
Vol. E93-C  No. 3  pp. 317-323
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
SSDboost convertercharge pumpinductor designTSV's
 Summary | Full Text:PDF(1.3MB)

Difficulty of Power Supply Voltage Scaling in Large Scale Subthreshold Logic Circuits
Tadashi YASUFUKU Taro NIIYAMA Zhe PIAO Koichi ISHIDA Masami MURAKATA Makoto TAKAMIYA Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/03/01
Vol. E93-C  No. 3  pp. 332-339
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
minimum operating voltagesubthresholdlogicvariationsbody bias
 Summary | Full Text:PDF(1MB)

A 100 Mbps, 4.1 pJ/bit Threshold Detection-Based Impulse Radio UWB Transceiver in 90 nm CMOS
Lechang LIU Yoshio MIYAMOTO Zhiwei ZHOU Kosuke SAKAIDA Jisun RYU Koichi ISHIDA Makoto TAKAMIYA Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/06/01
Vol. E92-C  No. 6  pp. 769-776
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
impulse radio ultra-wideband (IR-UWB)digital pulse-shapingpulse discriminatorerror-recovery phase-frequency detector
 Summary | Full Text:PDF(1010.1KB)

An On-Chip Noise Canceller with High Voltage Supply Lines for Nanosecond-Range Power Supply Noise
Yasumi NAKAMURA Makoto TAKAMIYA Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/04/01
Vol. E92-C  No. 4  pp. 468-474
Type of Manuscript:  Special Section PAPER (Special Section on Low-Leakage, Low-Voltage, Low-Power and High-Speed Technologies for System LSIs in Deep-Submicron Era)
Category: 
Keyword: 
power integritypower gatingwake-updynamic voltage and frequency scalingnoise canceller
 Summary | Full Text:PDF(952KB)

Closed-Form Expressions for Crosstalk Noise and Worst-Case Delay on Capacitively Coupled Distributed RC Lines
Hiroshi KAWAGUCHI Danardono Dwi ANTONO Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/12/01
Vol. E90-A  No. 12  pp. 2669-2681
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Design
Keyword: 
interconnectioncrosstalkcoupled transmission linesintegrated circuit noisedelays
 Summary | Full Text:PDF(1012.4KB)

Daisy Chain Transmitter for Power Reduction in Inductive-Coupling CMOS Link
Kiichi NIITSU Noriyuki MIURA Mari INOUE Yoshihiro NAKAGAWA Masamoto TAGO Masayuki MIZUNO Takayasu SAKURAI Tadahiro KURODA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/04/01
Vol. E90-C  No. 4  pp. 829-835
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
Category: Analog and Communications
Keyword: 
low powerdaisy chaininductive couplingwide bandwidth
 Summary | Full Text:PDF(1.7MB)

An Outside-Rail Opamp Design Relaxing Low-Voltage Constraint on Future Scaled Transistors
Koichi ISHIDA Atit TAMTRAKARN Hiroki ISHIKURO Makoto TAKAMIYA Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/04/01
Vol. E90-C  No. 4  pp. 786-792
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
Category: Analog and Communications
Keyword: 
outside-railopampscaling
 Summary | Full Text:PDF(759.8KB)

A Self-Alignment Row-by-Row Variable-VDD Scheme Reducing 90% of Active-Leakage Power in SRAM's
Fayez Robert SALIBA Hiroshi KAWAGUCHI Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/04/01
Vol. E90-C  No. 4  pp. 743-748
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
Category: Memory
Keyword: 
active leakagelow powerSRAM
 Summary | Full Text:PDF(994KB)

Simple Waveform Model of Inductive Interconnects by Delayed Quadratic Transfer Function with Application to Scaling Trend of Inductive Effects in VLSI's
Danardono Dwi ANTONO Kenichi INAGAKI Hiroshi KAWAGUCHI Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/12/01
Vol. E89-A  No. 12  pp. 3569-3578
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Interconnect
Keyword: 
on-chip interconnectsinductive effectinductive indexovershootpropagation delay
 Summary | Full Text:PDF(2.6MB)

Low-Power Low-Leakage FPGA Design Using Zigzag Power Gating, Dual-VTH/VDD and Micro-VDD-Hopping
Canh Quang TRAN Hiroshi KAWAGUCHI Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/03/01
Vol. E89-C  No. 3  pp. 280-286
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era)
Category: Low Power Techniques
Keyword: 
FPGAlow powerlow leakageVDD hoppingZigzag power-gating
 Summary | Full Text:PDF(952.1KB)

A 1.2 Gbps Non-contact 3D-Stacked Inter-Chip Data Communications Technology
Daisuke MIZOGUCHI Noriyuki MIURA Takayasu SAKURAI Tadahiro KURODA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/03/01
Vol. E89-C  No. 3  pp. 320-326
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era)
Category: Interface and Interconnect Techniques
Keyword: 
inductive couplingwireless superconnect3D-stacked chipslow powerhigh bandwidth
 Summary | Full Text:PDF(904KB)

Trends of On-Chip Interconnects in Deep Sub-Micron VLSI
Danardono Dwi ANTONO Kenichi INAGAKI Hiroshi KAWAGUCHI Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/03/01
Vol. E89-C  No. 3  pp. 392-394
Type of Manuscript:  Special Section LETTER (Special Section on VLSI Design Technology in the Sub-100 nm Era)
Category: Interconnect Technique
Keyword: 
on-chip interconnectsdeep sub-microninductive effectsignal integrity
 Summary | Full Text:PDF(1.1MB)

Row-by-Row Dynamic Source-Line Voltage Control (RRDSV) Scheme for Two Orders of Magnitude Leakage Current Reduction of Sub-1-V-VDD SRAM's
Kyeong-Sik MIN Kouichi KANDA Hiroshi KAWAGUCHI Kenichi INAGAKI Fayez Robert SALIBA Hoon-Dae CHOI Hyun-Young CHOI Daejeong KIM Dong Myong KIM Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/04/01
Vol. E88-C  No. 4  pp. 760-767
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
low-voltage SRAMlow-power SRAMrow-by-rowlow-leakageleakage reduction techniqueleakage suppression techniquesubthreshold current
 Summary | Full Text:PDF(1.5MB)

Perspectives of Low-Power VLSI's
Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C  No. 4  pp. 429-436
Type of Manuscript:  INVITED PAPER (Special Section on Low-Power System LSI, IP and Related Technologies)
Category: 
Keyword: 
digitalmemoryapplicationlow powerVLSIleakage
 Summary | Full Text:PDF(1.7MB)

A Controller LSI for Realizing VDD-Hopping Scheme with Off-the-Shelf Processors and Its Application to MPEG4 System
Hiroshi KAWAGUCHI Gang ZHANG Seongsoo LEE Youngsoo SHIN Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/02/01
Vol. E85-C  No. 2  pp. 263-271
Type of Manuscript:  Special Section PAPER (Special Issue on High-Performance and Low-Power Microprocessors)
Category: Low-Power Technologies
Keyword: 
low powerreal-time embedded systemdynamic voltage scalingapplication slicingMPEG4
 Summary | Full Text:PDF(1.5MB)

Superconnect Technology
Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2001/12/01
Vol. E84-C  No. 12  pp. 1709-1716
Type of Manuscript:  INVITED PAPER (Special Issue on Integrated Systems with New Concepts)
Category: 
Keyword: 
system-on-a-chipsystem-in-a-packagesuperconnectRC delayinterconnect
 Summary | Full Text:PDF(1.4MB)

Variable Threshold-Voltage CMOS Technology
Tadahiro KURODA Tetsuya FUJITA Fumitoshi HATORI Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/11/25
Vol. E83-C  No. 11  pp. 1705-1715
Type of Manuscript:  INVITED PAPER (Special Issue on Low-power LSIs and Technologies)
Category: 
Keyword: 
low power CMOS designlow voltagethreshold voltagesubstrate bias
 Summary | Full Text:PDF(1.8MB)

Future Directions of Media Processors
Shunichi ISHIWATA Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/05/25
Vol. E81-C  No. 5  pp. 629-635
Type of Manuscript:  INVITED PAPER (Special Issue on Multimedia, Network, and DRAM LSIs)
Category: Multimedia
Keyword: 
media processorVLIWmultimedia extensionwide memory bandwidthlow power consumption
 Summary | Full Text:PDF(618.3KB)

Special and Embedded Memory Macrocells for Low-Cost and Low-Power in MPEG Environment
Hiroyuki HARA Masataka MATSUI Goichi OTOMO Katsuhiro SETA Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/06/25
Vol. E79-C  No. 6  pp. 750-756
Type of Manuscript:  Special Section PAPER (Special Issue on ULSI Memory Technology)
Category: Static RAMs
Keyword: 
MPEG2 decoder LSIcompression/decompressionorthogonal memoryembedded memoryon-chip memory testability
 Summary | Full Text:PDF(792.4KB)

Overview of Low-Power ULSI Circuit Techniques
Tadahiro KURODA Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/04/25
Vol. E78-C  No. 4  pp. 334-344
Type of Manuscript:  INVITED PAPER (Special Issue on Low-Voltage, Low-Power Integrated Circuits)
Category: 
Keyword: 
LSICMOSlow-powerlow-voltagepower-delay productenergy-delay productpass-transistor logic
 Summary | Full Text:PDF(940.9KB)

A 110-MHz/1-Mb Synchronous TagRAM
Yasuo UNEKAWA Tsuguo KOBAYASHI Tsukasa SHIROTORI Yukihiro FUJIMOTO Takayoshi SHIMAZAWA Kazutaka NOGAMI Takehiko NAKAO Kazuhiro SAWADA Masataka MATSUI Takayasu SAKURAI Man Kit TANG William A. HUFFMAN 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/05/25
Vol. E77-C  No. 5  pp. 733-740
Type of Manuscript:  Special Section PAPER (Special Section on the 1993 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.29, No.4 April 1994))
Category: 
Keyword: 
 Summary | Full Text:PDF(743.6KB)