Takashi TANIGUCHI

A Versatile Graphic and Display Processor for Car Navigation Systems and ITS Mobile Terminals
Takashi TANIGUCHI Atsushi NAGATA Tetsuji KISHI Yasushi TAMAKOSHI Yoshiteru MINO Masanori HENMI Masayuki MASUMOTO Hiroshi MANABE Satoshi SHIGENAGA Atsushi KOTANI Hiroshi KADOTA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2002/11/01
Vol. E85-D  No. 11  pp. 1801-1808
Type of Manuscript:  Special Section PAPER (Special Issue on Information System Technologies for ITS)
Category: 
Keyword: 
graphics, display, bus bandwidth, FPU, 
 Summary | Full Text:PDF
High-Speed Circuit Techniques for Battery-Operated 16 Mbit CMOS DRAM
Toshikazu SUZUKI Toru IWATA Hironori AKAMATSU Akihiro SAWADA Toshiaki TSUJI Hiroyuki YAMAUCHI Takashi TANIGUCHI Tsutomu FUJITA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/08/25
Vol. E77-C  No. 8  pp. 1334-1342
Type of Manuscript:  Special Section PAPER (Special Section on High Speed and High Density Multi Functional LSI Memories)
Category: DRAM
Keyword: 
DRAM, cycle time, battery operating, high speed, 
 Summary | Full Text:PDF
High Speed MOS Multiplier and Divider Using Redundant Binary Representation and Their Implementation in a Microprocessor
Shigeo KUNINOBU Tamotsu NISHIYAMA Takashi TANIGUCHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/03/25
Vol. E76-C  No. 3  pp. 436-445
Type of Manuscript:  Special Section PAPER (Special Issue on Multiple-Valued Integrated Circuits)
Category: 
Keyword: 
multiplier, divider, redundant binary, microprocessor, 
 Summary | Full Text:PDF