Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/06/01 Vol. E89-ANo. 6pp. 1527-1532 Type of Manuscript: Special Section PAPER (Special Section on Papers Selected from 2005 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2005)) Category: Keyword: PLL, jitter, delay clock, lock-in range, digital,