Takashi MIYAMORI


Architecture and Evaluation of Low Power Many-Core SoC with Two 32-Core Clusters
Takashi MIYAMORI Hui XU Hiroyuki USUI Soichiro HOSODA Toru SANO Kazumasa YAMAMOTO Takeshi KODAKA Nobuhiro NONOGAKI Nau OZAKI Jun TANABE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2014/04/01
Vol. E97-C  No. 4  pp. 360-368
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design,---,Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
many-corenetwork-on-chipVLIWlow powerface detectionH.264super resolution
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A 4GOPS 3 Way-VLIW Image Recognition Processor Based on a Configurable Media Processor
Hiroyuki TAKANO Takashi MIYAMORI Yasuhiro TANIGUCHI Yoshihisa KONDO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/02/01
Vol. E85-C  No. 2  pp. 347-351
Type of Manuscript:  Special Section PAPER (Special Issue on High-Performance and Low-Power Microprocessors)
Category: Product Designs
Keyword: 
configurable media-processorVLIWimage-recognition LSI
 Summary | Full Text:PDF

REMARC: Reconfigurable Multimedia Array Coprocessor
Takashi MIYAMORI Kunle OLUKOTUN 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1999/02/25
Vol. E82-D  No. 2  pp. 389-397
Type of Manuscript:  PAPER
Category: Computer Hardware and Design
Keyword: 
computer architecturereconfigurable computerarray processormultimedia application
 Summary | Full Text:PDF