Takashi IMAGAWA

An Error Correction Scheme through Time Redundancy for Enhancing Persistent Soft-Error Tolerance of CGRAs
Takashi IMAGAWA Masayuki HIROMOTO Hiroyuki OCHI Takashi SATO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2015/07/01
Vol. E98-C  No. 7  pp. 741-750
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
coarse-grained reconfigurable architecture, reliability, triple modular redundancy, immediate termination, error-critical period, 
 Summary | Full Text:PDF(1.4MB)
Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-Based Design and Its Irradiation Testing
Hiroaki KONOURA Dawood ALNAJJAR Yukio MITSUYAMA Hajime SHIMADA Kazutoshi KOBAYASHI Hiroyuki KANBARA Hiroyuki OCHI Takashi IMAGAWA Kazutoshi WAKABAYASHI Masanori HASHIMOTO Takao ONOYE Hidetoshi ONODERA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/12/01
Vol. E97-A  No. 12  pp. 2518-2529
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
reconfigurable architecture, soft error, radiation test, behavioral synthesis, state machine, 
 Summary | Full Text:PDF(3.8MB)
Comparative Evaluation of Lifetime Enhancement with Fault Avoidance on Dynamically Reconfigurable Devices
Hiroaki KONOURA Takashi IMAGAWA Yukio MITSUYAMA Masanori HASHIMOTO Takao ONOYE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/07/01
Vol. E97-A  No. 7  pp. 1468-1482
Type of Manuscript:  Special Section PAPER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
fault avoidance, lifetime enhancement, mean-time-to-failure (MTTF), partial reconfiguration, 
 Summary | Full Text:PDF(5.6MB)
A Cost-Effective Selective TMR for Coarse-Grained Reconfigurable Architectures Based on DFG-Level Vulnerability Analysis
Takashi IMAGAWA Hiroshi TSUTSUI Hiroyuki OCHI Takashi SATO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/04/01
Vol. E96-C  No. 4  pp. 454-462
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
soft error, single event upset, triple modular redundancy, reliability, simulated annealing, 
 Summary | Full Text:PDF(1.4MB)
Reliability Evaluation Environment for Exploring Design Space of Coarse-Grained Reconfigurable Architectures
Takashi IMAGAWA Masayuki HIROMOTO Hiroyuki OCHI Takashi SATO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/12/01
Vol. E93-A  No. 12  pp. 2524-2532
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
soft error, TMR, reliability, methodology, 
 Summary | Full Text:PDF(653KB)