Takao NISHIDA


REDUCT: A Redundant Fault Identification Algorithm Using Circuit Reduction Techniques
Miyako TANDAI Takao SHINSHA Takao NISHIDA Kaoru MORIWAKI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1993/07/25
Vol. E76-D  No. 7  pp. 776-790
Type of Manuscript:  Special Section PAPER (Special Issue on VLSI Testing and Testable Design)
Category: 
Keyword: 
hardware and designalgorithmdiagnosistest pattern generationredundant fault
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