IEICE Trans

Takafumi YAMAJI

A Direct Conversion Receiver Adopting Balanced Three-Phase Analog System Takafumi YAMAJI Takeshi UENO Tetsuro ITAKURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/02/01 Vol. E93-A No. 2 pp. 367-374 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: balanced 3-phase system, direct conversion receiver, ΔΣADC,
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55-mW, 1.2-V, 12-bit, 100-MSPS Pipeline ADCs for Wireless Receivers Tomohiko ITO Daisuke KUROSE Takeshi UENO Takafumi YAMAJI Tetsuro ITAKURA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/06/01 Vol. E91-C No. 6 pp. 887-893 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: A/D, ADC, pipeline, low power, amplifier, pseudo-differential amplifier, I/Q sharing,
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1.2 V, 24 mW/ch, 10 bit, 80 MSample/s Pipelined A/D Converters Takeshi UENO Tomohiko ITO Daisuke KUROSE Takafumi YAMAJI Tetsuro ITAKURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/02/01 Vol. E91-A No. 2 pp. 454-460 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: pipelined A/D converter, amplifier sharing, common-source, common-mode feedforward,
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A Low-Power Low-Noise Clock Signal Generator for Next-Generation Mobile Wireless Terminals Akihide SAI Daisuke KUROSE Takafumi YAMAJI Tetsuro ITAKURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/02/01 Vol. E91-A No. 2 pp. 557-560 Type of Manuscript: Special Section LETTER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: clock generator, jitter, PLL, Analog-to-Digital Converter (ADC),
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A 1.2-V, 12-bit, 200 MSample/s Current-Steering D/A Converter in 90-nm CMOS Takeshi UENO Takafumi YAMAJI Tetsuro ITAKURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/02/01 Vol. E90-A No. 2 pp. 365-371 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: D/A converter, current steering, low voltage, parasitic resistance, tree structure,
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Low-Power Design of 10-bit 80-MSPS Pipeline ADCs Tomohiko ITO Daisuke KUROSE Takeshi UENO Takafumi YAMAJI Tetsuro ITAKURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/07/01 Vol. E89-A No. 7 pp. 2003-2008 Type of Manuscript: PAPER Category: Analog Signal Processing Keyword: analog-to-digital converter, pipeline, amplifier sharing,
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Nonlinear Analysis of Bipolar Harmonic Mixer for Direct Conversion Receivers Hiroshi TANIMOTO Ryuta ITO Takafumi YAMAJI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/06/01 Vol. E88-C No. 6 pp. 1203-1211 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit and Device Technologies) Category: RF Keyword: harmonic mixer, BHMIX, theoretical analysis, down conversion mixer, conversion gain, IIP3, IIP2, self-mixing, dc offset, noise analysis, cyclostationary noise,
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A 2-GHz Down-Converter with 3-dB Bandwidth of 600 MHz Using LO Signal Suppressing Output Buffer Osamu WATANABE Takafumi YAMAJI Tetsuro ITAKURA Ichiro HATTORI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/02/01 Vol. E85-A No. 2 pp. 286-292 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: analog signal processing, integrated circuit, down-converter,
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A Low Offset 1.9-GHz Direct Conversion Receiver IC with Spurious Free Dynamic Range of over 67 dB Shoji OTAKA Takafumi YAMAJI Ryuichi FUJIMOTO Hiroshi TANIMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/02/01 Vol. E84-A No. 2 pp. 513-519 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques Supporting the System LSI Era) Category: Keyword: direct conversion receiver, double balanced mixer, variable gain amplifier, on-chip balun, 90 phase-shifter,
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A Digital-to-RF Converter Architecture Suitable for a Digital-to-RF Direct-Conversion Software Defined Radio Transmitter Takafumi YAMAJI Akira YASUDA Hiroshi TANIMOTO Yasuo SUZUKI
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2000/06/25 Vol. E83-B No. 6 pp. 1254-1260 Type of Manuscript: Special Section PAPER (Special Issue on Software Defined Radio and Its Technologies) Category: Keyword: DAC, digital-to-RF direct-conversion, software defined radio, ΔΣ modulation,
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System-Level Compensation Approach to Overcome Signal Saturation, DC Offset, and 2nd-Order Nonlinear Distortion in Linear Direct Conversion Receiver Hiroshi TSURUMI Miyuki SOEYA Hiroshi YOSHIDA Takafumi YAMAJI Hiroshi TANIMOTO Yasuo SUZUKI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1999/05/25 Vol. E82-C No. 5 pp. 708-716 Type of Manuscript: Special Section PAPER (Special Issue on Low Distortion Technology for Microwave Devices and Circuits) Category: Keyword: direct conversion receiver, linear modulation scheme, RF stage gain control, initial burst acquisition, DC offset canceler, 2nd-order intermodulation distortion,
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An Offset-Compensated CMOS Programmable Gain Amplifier Takafumi YAMAJI Tetsuro ITAKURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1997/02/25 Vol. E80-A No. 2 pp. 353-355 Type of Manuscript: Special Section LETTER (Special Section on Analog Circuit Techniques for System-on-Chip Integration) Category: Keyword: DC offset, offset compensation, TDMA, analog CMOS circuit, digital cellular,
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