Taek-Soo KIM


A Precision Floating-Gate Mismatch Measurement Technique for Analog Application
Won-Young JUNG Jong-Min KIM Jin-Soo KIM Taek-Soo KIM 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/05/01
Vol. E94-C  No. 5  pp. 780-785
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: 
Keyword: 
mismatch measurementfloating-gate capacitance measurement methodMIM capacitance
 Summary | Full Text:PDF(942.5KB)

On-Chip Charged Device Model ESD Protection Design Method Using Very Fast Transmission Line Pulse System for RF ICs
Jae-Young PARK Jong-Kyu SONG Dae-Woo KIM Chang-Soo JANG Won-Young JUNG Taek-Soo KIM 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/05/01
Vol. E93-C  No. 5  pp. 625-630
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: Analog/RF Devices
Keyword: 
electrostatic discharge (ESD)charged device model (CDM)very-fast transmission line pulse systemlow voltage triggered SCR devicesradio pulse integrated circuits (RF ICs)
 Summary | Full Text:PDF(4.9MB)

A Latchup-Free ESD Power Clamp Circuit with Stacked-Bipolar Devices for High-Voltage Integrated Circuits
Jae-Young PARK Jong-Kyu SONG Chang-Soo JANG San-Hong KIM Won-Young JUNG Taek-Soo KIM 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/05/01
Vol. E92-C  No. 5  pp. 671-675
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: 
Keyword: 
ESD (electrostatic discharge) ESD power clamp circuitlatch-upstacked-bipolar devices
 Summary | Full Text:PDF(632.1KB)