Tadayuki SAKAKIBARA


Interprocessor Memory Access Arbitrating Scheme for TCMP Type Vector Supercomputer
Tadayuki SAKAKIBARA Katsuyoshi KITAI Tadaaki ISOBE Shigeko YAZAWA Teruo TANAKA Yoshiko TAMAKI Yasuhiro INAGAMI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1997/09/25
Vol. E80-D  No. 9  pp. 925-932
Type of Manuscript:  Special Section PAPER (Special Issue on Architectures, Algorithms and Networks for Massively Parallel Computing)
Category: Computer Architecture
Keyword: 
supercomputervector processorTCMParbitrateinterprocessor memory access conflict
 Summary | Full Text:PDF

Scalable Parallel Memory Architecture with a Skew Scheme
Tadayuki SAKAKIBARA Katsuyoshi KITAI Tadaaki ISOBE Shigeko YAZAWA Teruo TANAKA Yasuhiro INAGAMI Yoshiko TAMAKI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1997/09/25
Vol. E80-D  No. 9  pp. 933-941
Type of Manuscript:  Special Section PAPER (Special Issue on Architectures, Algorithms and Networks for Massively Parallel Computing)
Category: Computer Architecture
Keyword: 
supercomputervector processorinterleaved parallel memoryskew schemememory access conflictpermanent-concentrationtransient-concentration
 Summary | Full Text:PDF