IEICE Trans

Sungho KANG

Built-In Self-Test for Static ADC Testing with a Triangle-Wave Incheol KIM Ingeol LEE Sungho KANG
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2013/02/01 Vol. E96-C No. 2 pp. 292-294 Type of Manuscript: BRIEF PAPER Category: Integrated Electronics Keyword: ADC, BIST, static test, triangle-wave,
	Summary \| Full Text:PDF(577.1KB)

Acceleration of Deep Packet Inspection Using a Multi-Byte Processing Prefilter Hyejeong HONG Sungho KANG
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2013/02/01 Vol. E96-B No. 2 pp. 643-646 Type of Manuscript: LETTER Category: Internet Keyword: computer network security, deep packet inspection, and string matching,
	Summary \| Full Text:PDF(229.6KB)

An Efficient IP Address Lookup Scheme Using Balanced Binary Search with Minimal Entry and Optimal Prefix Vector Hyuntae PARK Hyejeong HONG Sungho KANG
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2011/11/01 Vol. E94-B No. 11 pp. 3128-3131 Type of Manuscript: LETTER Category: Network System Keyword: IP address lookup, balanced binary search, minimal entry, optimal prefix vector,
	Summary \| Full Text:PDF(158.3KB)

Noise-Tolerant DAC BIST Scheme Using Integral Calculus Approach Hyeonuk SON Incheol KIM Sang-Goog LEE Jin-Ho AHN Jeong-Do KIM Sungho KANG
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/08/01 Vol. E94-C No. 8 pp. 1344-1347 Type of Manuscript: LETTER Category: Electronic Circuits Keyword: digital-to-analogue converter (DAC), built-in self-test (BIST), noise-immunity, static testing,
	Summary \| Full Text:PDF(573.2KB)

A Hardware-Efficient Pattern Matching Architecture Using Process Element Tree for Deep Packet Inspection Seongyong AHN Hyejeong HONG HyunJin KIM Jin-Ho AHN Dongmyong BAEK Sungho KANG
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2010/09/01 Vol. E93-B No. 9 pp. 2440-2442 Type of Manuscript: LETTER Category: Network Management/Operation Keyword: network intrusion detection system, deep packet inspection, pattern matching, brute-force algorithm,
	Summary \| Full Text:PDF(123.3KB)

A Pattern Partitioning Algorithm for Memory-Efficient Parallel String Matching in Deep Packet Inspection HyunJin KIM Hyejeong HONG Dongmyoung BAEK Sungho KANG
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2010/06/01 Vol. E93-B No. 6 pp. 1612-1614 Type of Manuscript: LETTER Category: Network Management/Operation Keyword: computer network security, deep packet inspection, finite state machine, pattern matching, and network monitoring,
	Summary \| Full Text:PDF(6.7MB)

A Fast IP Address Lookup Algorithm Based on Search Space Reduction Hyuntae PARK Hyunjin KIM Hong-Sik KIM Sungho KANG
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2010/04/01 Vol. E93-B No. 4 pp. 1009-1012 Type of Manuscript: LETTER Category: Switching for Communications Keyword: IP address lookup, search space reduction, partitioning,
	Summary \| Full Text:PDF(230.6KB)

Pattern Mapping Method for Low Power BIST Based on Transition Freezing Method Youbean KIM Jaewon JANG Hyunwook SON Sungho KANG
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2010/03/01 Vol. E93-D No. 3 pp. 643-646 Type of Manuscript: LETTER Category: Dependable Computing Keyword: BIST, low power BIST, design for testability,
	Summary \| Full Text:PDF(293.9KB)

Selective Scan Slice Grouping Technique for Efficient Test Data Compression Yongjoon KIM Jaeseok PARK Sungho KANG
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2010/02/01 Vol. E93-D No. 2 pp. 380-383 Type of Manuscript: LETTER Category: Dependable Computing Keyword: design for testability (DfT), scan testing, SoC test, test data compression,
	Summary \| Full Text:PDF(122.9KB)

A Memory-Efficient Pattern Matching with Hardware-Based Bit-Split String Matchers for Deep Packet Inspection HyunJin KIM Hong-Sik KIM Jung-Hee LEE Jin-Ho AHN Sungho KANG
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2010/02/01 Vol. E93-B No. 2 pp. 396-398 Type of Manuscript: LETTER Category: Network Management/Operation Keyword: computer network security, deep packet inspection, finite state machine, pattern matching, and network monitoring,
	Summary \| Full Text:PDF(269KB)

A Selective Scan Chain Activation Technique for Minimizing Average and Peak Power Consumption Yongjoon KIM Jaeseok PARK Sungho KANG
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2010/01/01 Vol. E93-D No. 1 pp. 193-196 Type of Manuscript: LETTER Category: Dependable Computing Keyword: design for testability (DfT), scan testing, scan cell reordering, low power test,
	Summary \| Full Text:PDF(140.5KB)

An Effective Programmable Memory BIST for Embedded Memory Youngkyu PARK Jaeseok PARK Taewoo HAN Sungho KANG
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2009/12/01 Vol. E92-D No. 12 pp. 2508-2511 Type of Manuscript: LETTER Category: Computer Components Keyword: Programmable BIST, test algorithm, multi-loop,
	Summary \| Full Text:PDF(630.8KB)

Grouped Scan Slice Repetition Method for Reducing Test Data Volume and Test Application Time Yongjoon KIM Myung-Hoon YANG Jaeseok PARK Eunsei PARK Sungho KANG
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2009/07/01 Vol. E92-D No. 7 pp. 1462-1465 Type of Manuscript: LETTER Category: VLSI Systems Keyword: design for testability (DfT), scan testing, test data compression,
	Summary \| Full Text:PDF(887.3KB)

A New Built-in Self Test Scheme for Phase-Locked Loops Using Internal Digital Signals Youbean KIM Kicheol KIM Incheol KIM Sungho KANG
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/10/01 Vol. E91-C No. 10 pp. 1713-1716 Type of Manuscript: LETTER Category: Integrated Electronics Keyword: mixed-signal test, PLL (phase-locked loops), BIST (built-in self test), DFT (design for testability),
	Summary \| Full Text:PDF(489.5KB)

A New Scan Power Reduction Scheme Using Transition Freezing for Pseudo-Random Logic BIST Youbean KIM Kicheol KIM Incheol KIM Hyunwook SON Sungho KANG
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2008/04/01 Vol. E91-D No. 4 pp. 1185-1188 Type of Manuscript: LETTER Category: Computer Components Keyword: low power BIST (Built-in Self Test), pseudo-random BIST, low power pattern generator,
	Summary \| Full Text:PDF(589.9KB)

A Low-Cost BIST Based on Histogram Testing for Analog to Digital Converters Kicheol KIM Youbean KIM Incheol KIM Hyeonuk SON Sungho KANG
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/04/01 Vol. E91-C No. 4 pp. 670-672 Type of Manuscript: LETTER Category: Semiconductor Materials and Devices Keyword: ADC testing, BIST, histogram testing,
	Summary \| Full Text:PDF(363.5KB)

MTR-Fill: A Simulated Annealing-Based X-Filling Technique to Reduce Test Power Dissipation for Scan-Based Designs Dong-Sup SONG Jin-Ho AHN Tae-Jin KIM Sungho KANG
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2008/04/01 Vol. E91-D No. 4 pp. 1197-1200 Type of Manuscript: LETTER Category: Dependable Computing Keyword: low power test, scan-based test, X-filling, test application time,
	Summary \| Full Text:PDF(538.3KB)

A New Analog-to-Digital Converter BIST Considering a Transient Zone Incheol KIM Kicheol KIM Youbean KIM HyeonUk SON Sungho KANG
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2007/11/01 Vol. E90-C No. 11 pp. 2161-2163 Type of Manuscript: LETTER Category: Integrated Electronics Keyword: static ADC built-in self-test, transient zone problem,
	Summary \| Full Text:PDF(409.8KB)

A Clustered RIN BIST Based on Signal Probabilities of Deterministic Test Sets Dong-Sup SONG Sungho KANG
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2006/01/01 Vol. E89-D No. 1 pp. 354-357 Type of Manuscript: LETTER Category: Dependable Computing Keyword: deterministic logic BIST, embedded core testing,
	Summary \| Full Text:PDF(587.3KB)

A New Low Power Test Pattern Generator for BIST Architecture Kicheol KIM Dongsub SONG Incheol KIM Sungho KANG
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/10/01 Vol. E88-C No. 10 pp. 2037-2038 Type of Manuscript: LETTER Category: Semiconductor Materials and Devices Keyword: low power BIST, low power test pattern generator,
	Summary \| Full Text:PDF(279.9KB)

An Effective Built-In Self-Test for Chargepump PLL Junseok HAN Dongsup SONG Hagbae KIM YoungYong KIM Sungho KANG
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/08/01 Vol. E88-C No. 8 pp. 1731-1733 Type of Manuscript: Special Section LETTER (Special Section on Papers Selected from AP-ASIC 2004) Category: Keyword: mixed-signal test, BIST, PLL,
	Summary \| Full Text:PDF(559.7KB)

An Acceleration Processor for Data Intensive Scientific Computing Cheong Ghil KIM Hong-Sik KIM Sungho KANG Shin Dug KIM Gunhee HAN
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2004/07/01 Vol. E87-D No. 7 pp. 1766-1773 Type of Manuscript: Special Section PAPER (Special Section on Hardware/Software Support for High Performance Scientific and Engineering Computing) Category: Scientific and Engineering Computing with Applications Keyword: SIMD, FPGA, artificial neural networks, diffusion equations, image processing,
	Summary \| Full Text:PDF(1.1MB)

A Low-Power Implementation Scheme of Interpolation FIR Filters Using Distributed Arithmetic Sangyun HWANG Gunhee HAN Sungho KANG Jaeseok KIM
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2003/11/01 Vol. E86-C No. 11 pp. 2346-2350 Type of Manuscript: LETTER Category: Integrated Electronics Keyword: low-power interpolation FIR filter, distributed arithmetic, look-up table, dynamic power consumption,
	Summary \| Full Text:PDF(531.2KB)

A DFT Controller for Instruction-Based Functional Test Hong-Sik KIM Yong-Chun KIM Sungho KANG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/08/01 Vol. E84-A No. 8 pp. 2070-2072 Type of Manuscript: LETTER Category: VLSI Design Technology and CAD Keyword: functional test, scan,
	Summary \| Full Text:PDF(258.9KB)

Efficient Test Generation Using Redundancy Identification Sangyoon HAN Sungho KANG
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2000/09/25 Vol. E83-D No. 9 pp. 1814-1815 Type of Manuscript: LETTER Category: Fault Tolerance Keyword: test pattern generation, redundant faults,
	Summary \| Full Text:PDF(108.2KB)