Soo-In CHO

A Decision Feedback Equalizing Receiver for the SSTL SDRAM Interface with Clock-Data Skew Compensation
Young-Soo SOHN Seung-Jun BAE Hong-June PARK Soo-In CHO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/05/01
Vol. E87-C  No. 5  pp. 809-817
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
SDRAM I/O interface, receiver equalization, SSTL, decision feedback equalization, clock-data skew compensation, X2 over-sampling phase detector, 
 Summary | Full Text:PDF
An Analytic Time Jitter Equation of NRZ Signals in Uniformly Loaded PCB Transmission Lines
Won-Ki PARK Young-Soo SOHN Jin-Seok PARK Hong-June PARK Soo-In CHO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2001/09/01
Vol. E84-C  No. 9  pp. 1264-1266
Type of Manuscript:  LETTER
Category: Electronic Circuits
Keyword: 
time jitter, loaded transmission line, digital signal, inter-symbol interference (ISI), 
 Summary | Full Text:PDF