Soo-Hyun KIM


Synthesis for Testability of Synchronous Sequential Circuits with Strong-Connectivity Using Undefined States on State Transition Graph
Soo-Hyun KIM Ho-Yong CHOI Kiseon KIM Dong-Ik LEE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/12/01
Vol. E87-A  No. 12  pp. 3216-3223
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Test
Keyword: 
synthesis for testabilityundefined statesredundant faults
 Summary | Full Text:PDF(231.1KB)

High-Level Test Generation for Asynchronous Circuits from Signal Transition Graph
Eunjung OH Soo-Hyun KIM Dong-Ik LEE Ho-Yong CHOI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/12/01
Vol. E85-A  No. 12  pp. 2674-2683
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Test Generation
Keyword: 
asynchronous circuitsATPGSTG
 Summary | Full Text:PDF(831.5KB)