Song CHEN


Mobility Overlap-Removal-Based Leakage Power and Register-Aware Scheduling in High-Level Synthesis
Nan WANG Song CHEN Wei ZHONG Nan LIU Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/08/01
Vol. E97-A  No. 8  pp. 1709-1719
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
mobility overlap removaldual-Vthleakage powerregister usagehigh-level synthesis
 Summary | Full Text:PDF

Leakage Power Aware Scheduling in High-Level Synthesis
Nan WANG Song CHEN Cong HAO Haoran ZHANG Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/04/01
Vol. E97-A  No. 4  pp. 940-951
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
dual-Vthleakage powermax-flow min-cut
 Summary | Full Text:PDF

Floorplanning and Topology Synthesis for Application-Specific Network-on-Chips
Wei ZHONG Song CHEN Bo HUANG Takeshi YOSHIMURA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/06/01
Vol. E96-A  No. 6  pp. 1174-1184
Type of Manuscript:  Special Section PAPER (Special Section on Circuit, System, and Computer Technologies)
Category: 
Keyword: 
networks on chip (NoC)topology synthesisfloorplanning
 Summary | Full Text:PDF

Resource-Aware Multi-Layer Floorplanning for Partially Reconfigurable FPGAs
Nan LIU Song CHEN Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/04/01
Vol. E96-C  No. 4  pp. 501-510
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
resource-awaremulti-layer floorlanningreconfigurable
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Novel Voltage Choice and Min-Cut Based Assignment for Dual-VDD System
Haiqi WANG Sheqin DONG Tao LIN Song CHEN Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/12/01
Vol. E95-A  No. 12  pp. 2208-2219
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Level Design
Keyword: 
dual-vddmin-cutvoltage assignmentlow powertiming constraints
 Summary | Full Text:PDF

Floorplanning for High Utilization of Heterogeneous FPGAs
Nan LIU Song CHEN Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/09/01
Vol. E95-A  No. 9  pp. 1529-1537
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
field programmable gate arrayfloorplanninghigh utilization
 Summary | Full Text:PDF

Cluster Generation and Network Component Insertion for Topology Synthesis of Application-Specific Network-on-Chips
Wei ZHONG Takeshi YOSHIMURA Bei YU Song CHEN Sheqin DONG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C  No. 4  pp. 534-545
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
networks on chip (NoC)placementsynthesistopology
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Redundant via Insertion: Removing Design Rule Conflicts and Balancing via Density
Song CHEN Jianwei SHEN Wei GUO Mei-Fang CHIANG Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/12/01
Vol. E93-A  No. 12  pp. 2372-2379
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Level Design
Keyword: 
redundant viadouble viadesign for manufacturabilityvia density
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Voltage and Level-Shifter Assignment Driven Floorplanning
Bei YU Sheqin DONG Song CHEN Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/12/01
Vol. E92-A  No. 12  pp. 2990-2997
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Level Desing
Keyword: 
voltage-islandvoltage assignmentconvex network flowlevel shifter assignmentwhite space redistribution
 Summary | Full Text:PDF

Lagrangian Relaxation Based Inter-Layer Signal Via Assignment for 3-D ICs
Song CHEN Liangwei GE Mei-Fang CHIANG Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/04/01
Vol. E92-A  No. 4  pp. 1080-1087
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Technologies Emerging Mainly from the 21st Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
three dimensional integrated circuitsthrough-the-silicon viavia assignment
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Max-Flow Scheduling in High-Level Synthesis
Liangwei GE Song CHEN Kazutoshi WAKABAYASHI Takashi TAKENAKA Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/09/01
Vol. E90-A  No. 9  pp. 1940-1948
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
schedulinghigh-level synthesispower-ground integrity
 Summary | Full Text:PDF

VLSI Module Placement with Pre-Placed Modules and with Consideration of Congestion Using Solution Space Smoothing
Sheqin DONG Xianlong HONG Song CHEN Xin QI Ruijie WANG Jun GU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/12/01
Vol. E86-A  No. 12  pp. 3136-3147
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Place and Routing
Keyword: 
floorplanplacementsolution space smoothing
 Summary | Full Text:PDF

Semi-Automatic Tool for Aligning a Parameterized CAD Model to Stereo Image Pairs
Chu-Song CHEN Kuan-Chung HUNG Yi-Ping HUNG Lin-Lin CHEN Chiou-Shann FUH 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1999/12/25
Vol. E82-D  No. 12  pp. 1582-1588
Type of Manuscript:  PAPER
Category: Image Processing,Computer Graphics and Pattern Recognition
Keyword: 
computer visionrough CAD model3D reconstruction
 Summary | Full Text:PDF

Extraction of Corner-Edge-Surface Structure from Range Images Using Mathematical Morphology
Chu-Song CHEN Yi-Ping HUNG Ja-Ling WU 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1995/12/25
Vol. E78-D  No. 12  pp. 1636-1641
Type of Manuscript:  Special Section PAPER (Special Issue on Machine Vision Applications)
Category: 
Keyword: 
machine vision algorithmsfeature extractionrangedata/3D shapes
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