Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2014/04/01 Vol. E97-CNo. 4pp. 332-341 Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design,---,Architecture, Circuit, Device and Design Methodology) Category: Keyword: design for robustness, cache, variation tolerance, 7T/14T SRAM,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2012/12/01 Vol. E95-ANo. 12pp. 2226-2233 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Circuit Design Keyword: SRAM, chip ID, physical unclonable function (PUF),
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2011/12/01 Vol. E94-ANo. 12pp. 2693-2700 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Circuit Design Keyword: SRAM DMA, transactional memory, checkpoint and recovery, multi-core processor,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2009/04/01 Vol. E92-CNo. 4pp. 423-432 Type of Manuscript: Special Section PAPER (Special Section on Low-Leakage, Low-Voltage, Low-Power and High-Speed Technologies for System LSIs in Deep-Submicron Era) Category: Keyword: SRAM, dependability, quality of a bit,