Shunji SAIKA


WSSA: A High Performance Simulated Annealing and Its Application to Transistor Placement
Shunji SAIKA Masahiro FUKUI Masahiko TOYONAGA Toshiro AKINO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/12/25
Vol. E83-A  No. 12  pp. 2584-2591
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Layout Synthesis
Keyword: 
simulated annealingtemperature schedulingphase transitionplacement optimizationcell synthesis
 Summary | Full Text:PDF

A Two-Dimensional Transistor Placement Algorithm for Cell Synthesis and Its Application to Standard Cells
Shunji SAIKA Masahiro FUKUI Noriko SHINOMIYA Toshiro AKINO Shigeo KUNINOBU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/10/25
Vol. E80-A  No. 10  pp. 1883-1891
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
cell layoutcell synthesistransistor placementtwo-dimensional placement
 Summary | Full Text:PDF