Shoichiro KAWASHIMA


An 8-Mbit 0.18-µm CMOS 1T1C FeRAM in Planar Technology
Shoichiro KAWASHIMA Keizo MORITA Mitsuharu NAKAZAWA Kazuaki YAMANE Mitsuhiro OGAI Kuninori KAWABATA Kazuaki TAKAI Yasuhiro FUJII Ryoji YASUDA Wensheng WANG Yukinobu HIKOSAKA Ken'ichi INOUE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2015/11/01
Vol. E98-C  No. 11  pp. 1047-1057
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
1T1C-FeRAMsectional cyclic word linebit-line GND level sensingplanar FeRAM celltemperature-bit distribution
 Summary | Full Text:PDF

A Reliable 1T1C FeRAM Using a Thermal History Tracking 2T2C Dual Reference Level Technique for a Smart Card Application Chip
Shoichiro KAWASHIMA Isao FUKUSHI Keizo MORITA Ken-ichi NAKABAYASHI Mitsuharu NAKAZAWA Kazuaki YAMANE Tomohisa HIRAYAMA Toru ENDO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/10/01
Vol. E90-C  No. 10  pp. 1941-1948
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Technology toward Frontiers of New Market)
Category: Next-Generation Memory for SoC
Keyword: 
FeRAMBGS2T2C-referenceFIPself-timingECCSmart Card
 Summary | Full Text:PDF

A 1 V, 10.4 mW Low Power DSP Core for Mobile Wireless Use
Shoichiro KAWASHIMA Tetsuyoshi SHIOTA Isao FUKUSHI Ryuhei SASAGAWA Wataru SHIBAMOTO Atsushi TSUCHIYA Teruo ISHIHARA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/11/25
Vol. E83-C  No. 11  pp. 1739-1746
Type of Manuscript:  Special Section PAPER (Special Issue on Low-power LSIs and Technologies)
Category: 
Keyword: 
low-powerMACvoltage up convertersignal level converter1 V ROM
 Summary | Full Text:PDF