Shin-ichi KOBAYASHI

Improved Array Architectures of DINOR for 0.5 µm 32 M and 64 Mbit Flash Memories
Hiroshi ONODA Yuichi KUNORI Kojiro YUZURIHA Shin-ichi KOBAYASHI Kiyohiko SAKAKIBARA Makoto OHI Atsushi FUKUMOTO Natsuo AJIKA Masahiro HATANAKA Hirokazu MIYOSHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/08/25
Vol. E77-C  No. 8  pp. 1279-1286
Type of Manuscript:  Special Section PAPER (Special Section on High Speed and High Density Multi Functional LSI Memories)
Category: Non-volatile Memory
Keyword: 
Fowler-Nordheim tunneling, virtual ground array, flash memory, NOR, asymmetrical source/drain structure, 
 Summary | Full Text:PDF(1MB)
Memory Array Architecture and Decoding Scheme for 3 V Only Sector Erasable DINOR Flash Memory
Shin-ichi KOBAYASHI Hiroaki NAKAI Yuichi KUNORI Takeshi NAKAYAMA Yoshikazu MIYAWAKI Yasushi TERADA Hiroshi ONODA Natsuo AJIKA Masahiro HATANAKA Hirokazu MIYOSHI Tsutomu YOSHIHARA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/05/25
Vol. E77-C  No. 5  pp. 784-790
Type of Manuscript:  Special Section PAPER (Special Section on the 1993 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.29, No.4 April 1994))
Category: 
Keyword: 
 Summary | Full Text:PDF(634.9KB)
A New Erasing and Row Decoding Scheme for Low Supply Voltage Operation 16-Mb/64-Mb Flash Memories
Yoshikazu MIYAWAKI Takeshi NAKAYAMA Shin-ichi KOBAYASHI Natsuo AJIKA Makoto OHI Yasushi TERADA Hideaki ARIMA Tsutomu YOSHIHARA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/04/25
Vol. E75-C  No. 4  pp. 481-486
Type of Manuscript:  Special Section PAPER (Joint Special Issue on the 1991 VLSI Circuits Symposium)
Category: 
Keyword: 
 Summary | Full Text:PDF(652.8KB)