Shimpei SATO


A Fast Length Matching Routing Pattern Generation Method for Set-Pair Routing Problem Using Selective Pin-Pair Connections
Shimpei SATO Kano AKAGI Atsushi TAKAHASHI 
Publication:   
Publication Date: 2020/09/01
Vol. E103-A  No. 9  pp. 1037-1044
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Systems)
Category: 
Keyword: 
routing algorithmset-pair routing problemPCBinterposer
 Summary | Full Text:PDF(1015.2KB)

A Low Area Overhead Design Method for High-Performance General-Synchronous Circuits with Speculative Execution
Shimpei SATO Eijiro SASSA Yuta UKON Atsushi TAKAHASHI 
Publication:   
Publication Date: 2019/12/01
Vol. E102-A  No. 12  pp. 1760-1769
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
circuit designvariable-latency circuitspeculative executiongeneral-synchronous circuittiming-error detection
 Summary | Full Text:PDF(1.5MB)

Power Efficient Object Detector with an Event-Driven Camera for Moving Object Surveillance on an FPGA
Masayuki SHIMODA Shimpei SATO Hiroki NAKAHARA 
Publication:   
Publication Date: 2019/05/01
Vol. E102-D  No. 5  pp. 1020-1028
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Applications
Keyword: 
event-driven cameraobject detectorall binarized convolutional neural networkFPGA
 Summary | Full Text:PDF(1.5MB)

GUINNESS: A GUI Based Binarized Deep Neural Network Framework for Software Programmers
Hiroki NAKAHARA Haruyoshi YONEKAWA Tomoya FUJII Masayuki SHIMODA Shimpei SATO 
Publication:   
Publication Date: 2019/05/01
Vol. E102-D  No. 5  pp. 1003-1011
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Design Tools
Keyword: 
machine learningdeep learningpruningFPGA
 Summary | Full Text:PDF(1.2MB)

An FPGA Realization of a Random Forest with k-Means Clustering Using a High-Level Synthesis Design
Akira JINGUJI Shimpei SATO Hiroki NAKAHARA 
Publication:   
Publication Date: 2018/02/01
Vol. E101-D  No. 2  pp. 354-362
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Emerging Applications
Keyword: 
machine learningrandom forestk-means clusteringFPGA
 Summary | Full Text:PDF(1.4MB)

ArchHDL: A Novel Hardware RTL Modeling and High-Speed Simulation Environment
Shimpei SATO Ryohei KOBAYASHI Kenji KISE 
Publication:   
Publication Date: 2018/02/01
Vol. E101-D  No. 2  pp. 344-353
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Design Methodology and Platform
Keyword: 
hardware description languageRTL modelingRTL simulation
 Summary | Full Text:PDF(831.3KB)

A Threshold Neuron Pruning for a Binarized Deep Neural Network on an FPGA
Tomoya FUJII Shimpei SATO Hiroki NAKAHARA 
Publication:   
Publication Date: 2018/02/01
Vol. E101-D  No. 2  pp. 376-386
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Emerging Applications
Keyword: 
machine learningdeep learningpruningFPGA
 Summary | Full Text:PDF(1.2MB)