Shih-Hsu HUANG


Temperature-Aware Layer Assignment for Three-Dimensional Integrated Circuits
Shih-Hsu HUANG Hua-Hsin YEH 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/08/01
Vol. E97-A  No. 8  pp. 1699-1708
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
electronic design automationhigh-level design stagedesign partitioninglayer assignmentthree-dimensional integrated circuitstemperature increase
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An ILP Approach to the Simultaneous Application of Operation Scheduling and Power Management
Shih-Hsu HUANG Chun-Hua CHENG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/01/01
Vol. E91-A  No. 1  pp. 375-382
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
high-level synthesisinteger linear programmingschedulinglow power
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Opposite-Phase Clock Tree for Peak Current Reduction
Yow-Tyng NIEH Shih-Hsu HUANG Sheng-Yu HSU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/12/01
Vol. E90-A  No. 12  pp. 2727-2735
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Circuit Synthesis
Keyword: 
clocksdesign methodologydigital circuits
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An ILP Approach to the Slack Driven Scheduling Problem
Shih-Hsu HUANG Chun-Hua CHENG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/06/01
Vol. E89-A  No. 6  pp. 1852-1858
Type of Manuscript:  LETTER
Category: VLSI Design Technology and CAD
Keyword: 
high-level synthesisinteger linear programmingschedulingslack optimization
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A High Speed Fuzzy Inference Processor with Dynamic Analysis and Scheduling Capabilities
Shih-Hsu HUANG Jian-Yuan LAI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/10/01
Vol. E88-D  No. 10  pp. 2410-2416
Type of Manuscript:  LETTER
Category: Computer Components
Keyword: 
fuzzy logicfuzzy rulefuzzy inferencedigital designintegrated circuit
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A Timing Driven Crosstalk Optimizer for Gridded Channel Routing
Shih-Hsu HUANG Yi-Siang HSU Chiu-Cheng LIN 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2004/06/01
Vol. E87-D  No. 6  pp. 1575-1581
Type of Manuscript:  LETTER
Category: Computer Components
Keyword: 
layoutgridded channel routingcrosstalk minimizationdelay degradationrelative signal arrival time
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