Shigeki SAWADA


A 10-b 300-MHz Interpolated-Parallel A/D Converter
Hiroshi KIMURA Akira MATSUZAWA Takashi NAKAMURA Shigeki SAWADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/05/25
Vol. E76-C  No. 5  pp. 778-786
Type of Manuscript:  Special Section PAPER (Special Section on the 1992 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.28, No.4 April 1993))
Category: 
Keyword: 
A/D converterparallelinterpolationhigh speedhigh resolutionlinearitycircuitbipolarsubmicrometerfoldingencoderlogic
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